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Pin Description
PIN
NAME FUNCTION
REF
SUPPLY
TYPE
TQFN32 TSSOP38
4 10 AGND Analog Ground. Connect to ground plane. GND
— 27, 31 PGND Power ground. Connect to ground plane. GND
17, 20, 21, 24 25, 29, 33 V
S
Motor supply voltage. Provide filtering capacity
near pin with shortest loop to GND plane/exposed
pad.
Supply
3 9 V
DD1V8
Output of internal 1.8V regulator. Attach 2.2µF or
larger ceramic capacitor to AGND near to pin for
best performance.
Supply
16 23 V
CP
Charge pump voltage. Tie to V
S
using 1.0µF
capacitor.
Connect positive end of capacitor close to V
S
pin
to avoid inductive peaks.
Analog
Output
5 11 V
CC_IO
Digital IO supply voltage provided from external
source to define circuit IO level. Required for
proper voltage level settings on output pins.
V
CC_IO
Analog Input
15 22 CPO Charge pump capacitor output.
Analog
Output
14 20 CPI
Charge pump capacitor input. Tie to CPO using
22nF 50V capacitor.
Analog
Output
30 3 CLK
CLK input. Tie to GND using short wire for
internal clock or supply external clock. Internal
clock-fail over circuit protects against loss of
external clock signal.
V
CC_IO
Digital Input
31 5 REFL Left reference input for internal ramp generator V
CC_IO
Digital Input
32 6 REFR Right reference input for internal ramp generator V
CC_IO
Digital Input
26 36 CSN/AD2
SPI chip select input (negative active) (UART_EN
= 0) or Address input 2 (+4) in UART mode
(UART_EN = 1).
V
CC_IO
Digital Input
(pull down)
27 38 SCK/AD1
SPI serial clock input (UART_EN = 0) or address
input 1 (+2) in UART mode (UART_EN = 1).
V
CC_IO
Digital Input
(pull down)
28 1 SDI/AD0
SPI data input (UART_EN = 0) or address input 0
(+1) for single wire interface (UART_EN = 1).
V
CC_IO
Digital Input
(pull down)
29 2 SDO/NAO
SPI data output (three-state) (UART_EN = 0) or
next address output (NAO) for single wire
interface (UART_EN = 1).
V
CC_IO
Digital IO
(pull down)
1 7 IREF
Analog reference current for current scaling.
Provide external resistor to GND.
V
CC_IO
Analog Input
10 16 UART_EN
Interface selection pin.
When tied low, the SPI interface is enabled.
When tied high, the UART interface is enabled.
Integrated pull-down resistor.
V
CC_IO
Digital Input
(pull down)
7 13 ENCB Encoder B-channel input. V
CC_IO
Digital Input
8 14 ENCA Encoder A-channel input. V
CC_IO
Digital Input
TMC5240 36V 2Arms Smart Integrated Stepper Driver and Controller
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PRELIMINARY