"经典教材：Verilog-A/AMS IC设计验证与模拟建模指南"

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IC设计验证是一项十分重要的工作，而Verilog-A/AMS则是这一领域的经典教材。Analog Modeling和Mixed-Signal Modeling是IC设计中不可或缺的技术，而《THE DESIGNER'S GUIDE TO VERILOG-AMS》这本书则成为了这一领域中的权威指南。该书由Kenneth S. Kundert和Olaf Zinke编写，介绍了Verilog-AMS的基础知识和实践技巧，帮助读者在IC设计验证中取得成功。《THE DESIGNER'S GUIDE BOOK SERIES》这个系列中的书籍涵盖了多个领域，包括Verilog-AMS、SPICE和Spectre等。其中，《THE DESIGNER'S GUIDE TO VERILOG-AMS》作为这个系列的重要组成部分，为读者提供了深入探讨Verilog-AMS的独特视角。这本书于2004年首次出版，由Cadence Design Systems出版，成为了学习和实践Verilog-AMS的必备资料。通过阅读《THE DESIGNER'S GUIDE TO VERILOG-AMS》，读者可以了解Verilog-AMS的基本概念、语法规则和应用技巧。该书详细介绍了Verilog-AMS模型的建立过程，包括模拟和数字系统的结合、混合信号建模等内容。读者可以通过学习本书，了解Verilog-AMS在IC设计验证中的重要作用，提高自己的技术水平和工作效率。总的来说，《THE DESIGNER'S GUIDE TO VERILOG-AMS》是一本值得推荐的经典教材，适用于IC设计领域的工程师、研究人员和学生。该书深入浅出地介绍了Verilog-AMS的基础知识和实践技巧，为读者打开了一扇通往IC设计验证领域的大门。读者可以通过学习《THE DESIGNER'S GUIDE TO VERILOG-AMS》，提升自己的技术水平，掌握Verilog-AMS的应用技巧，实现在IC设计领域的成功。

3 Mixed-Signal Simulators

Finally, it is important to recognize that Verilog-AMS is primarily used for verifica-

tion. Unlike the digital languages, the AMS languages will not be used for synthesis

in the foreseeable future because the only synthesis that is available for analog circuits

is very narrowly focused.

Mixed-Signal Simulators

Mixed-signal simulators, by their very nature, combine two different methods of sim-

ulation: event-driven simulation as found in logic simulators, and continuous-time

simulation as found in circuit simulators. As such, they are said to have two kernels; a

discrete-event kernel and a continuous-time kernel. These two kernels are an essential

feature of any mixed-signal simulator. Indeed, it is what separates mixed-signal simu-

lation from other types of simulation. Within these constraints, mixed-signal simula-

tors have changed considerably through the years.

Mixed-signal simulators first established themselves in the early 1990’s. At this time

there were two basic approaches, as shown in Figure 3. In one, a mixed-signal kernel

was added to an established circuit simulator. Analogy’s Saber and Georgia Tech’s

XSPICE are examples. These simulators offered relatively simple and low-level mech-

anisms to support event-driven simulation. They were quite different from, and

incompatible with, the standard logic simulators of the day, such as Verilog-XL. As a

result, while useful, these capabilities never gained wide acceptance. This lack of

acceptance was addressed in the other approach, which simply glued together an

established circuit simulator, generally some form of SPICE, and an established logic

simulator, usually Verilog-XL. An example of this type of simulator is Spectre/Ver-

ilog-XL from Cadence. This approach addressed the lack of acceptance issue, but cre-

ate

ease-of-use and performance problems. The ease-of-use problems stem from the

complexity of getting two simulators with very different use models to operate

together. Generally, some form of mixed-signal design environment is required to

manage the process of splitting the netlist between SPICE and Verilog, inserting the

interface components, setting up and running the simulation, and accessing and dis-

playing the results. Even with the environment, glued simulators developed a reputa-

tion of being difficult to use. The performance issues stem from the distant separation

between the analog and digital parts of the circuit, and the overhead in the communi-

cation between the two simulators.

The AMS languages, Verilog-AMS and VHDL-AMS, address many of these issues.

They provide a single standard input language that both supports mixed-signal

descriptions, and is based on the standard languages used by logic simulators. As

such, they provide the advantages of both types of early mixed-signal simulators,

3 Mixed-Signal Simulators

designs. The reason compatibility is critical is that generally large MS-SOCs are

assembled from pieces that are designed with the help of the component simulators.

The digital blocks would have been simulated with an established logic simulator and

the analog blocks with an established circuit simulator. The various descriptions of

the blocks must be reusable in the mixed-signal simulator without modification.

Hence, the analog kernel must be completely compatible with the established circuit

simulator, and the digital kernel must be completely compatible with the established

logic simulator. In addition, because of the size of the designs, both kernels must pro-

vide performance that is comparable with the best engines on the market.

Both requirements point to the need to bolt together an established circuit simulator

with an established logic simulator, and all commercial offerings do just that. How-

ever, it takes a great deal of effort to tightly merge an established circuit simulator and

an established logic simulator, which is what is required when providing an integrated

AMS simulator. Both the circuit and the logic simulator must be extensively modi-

fied, which requires a substantial commitment from both simulator development

teams. Cadence’s AMS Designer is an example of an integrated AMS simulator; it

tightly merges the Spectre circuit simulator with the NC-S

IM logic simulator.

The heavy investment needed to build an integrated AMS simulator has led to the

development of glued AMS simulators. Here, AMS extensions are added to an estab-

lished circuit simulator to provide the needed discrete-event kernel with tight integra-

tion to the continuous-time kernel, but extensions provide neither the performance of

an established logic simulator, nor compatibility with such a simulator. As such, an

established logic simulator must also be added to the mix, but in this case it is added

as a separate, loosely integrated executable. In fact, the integration between the AMS

simulator and the established logic simulator is virtually the same as the integration in

the old glued mixed-signal simulators; with many of the same issues and with the

added complication of having a redundant logic simulation capability.

Mentor’s ADVance MS is an example of a glued AMS simulator. In another interest-

ing twist, Mentor’s marketing literature has described ADVance MS as a “single ker-

nel” simulator. This is clearly incorrect, at least when using the word “kernel” in the

way it is commonly used in mixed-signal simulation. An AMS simulator needs at

least two kernels.

In an application of the old adage: “if you can’t fix it, feature it,” they are trying to

suggest that by building the AMS extensions into their circuit simulator they have an

inherently tighter coupling between the continuous-time and discrete-event kernels.

But, in fact, there is no justification for such a claim. They are also trying to take

attention off the fact that they have only a distant integration with their established

ModelSim logic simulator. In a very real sense, they have a three kernel rather than a

4 Applications of Verilog-AMS

The term ‘compact model’ refers to the lumped models used by circuit simulators.

More specifically, it is generally used to refer to the models of semiconductor compo-

nents commonly incorporated into SPICE. As of the year this book was written, 2004,

these models are largely implemented in C code that is compiled into the simulator.

These models can be quite complex and are difficult to create and maintain. In addi-

tion, as each simulator has its own compiled model interface, the models are not por-

table between simulators. These issues create numerous problems for the people that

develop the compact models, the people that develop the simulators, and the people

that use and support the simulators [17]. As a result, there is increasing interest in

instead writing and distributing the models in Verilog-A. Doing so addresses most, if

not all, of the existing problems. Verilog-A is a standard language, so models would

be portable. If the models were made available in source form, end users could correct

any flaws in the model or enhance them as needed. Finally, models written in Verilog-

A tend to be much smaller and more easily maintained than models written in C. Usu-

ally more than a 10

reduction in the amount of source code needed to represent the

mode

is easily achievable.

To support the development of compact models in Verilog-A, extensions to the lan-

guage are currently being developed. It is hoped that a future edition of this book will

describe those extensions.

Examples of all of these can be found in the library of Verilog-A/MS models at

www.verilog-ams.com.

The ability to add models to a circuit simulator such as SPICE dramatically increases it

range, and makes it immensely more powerful. The most obvious benefit is that it can

simulate a broader variety of systems. The ability to add models of laser and photo

diodes makes it suitable for electro-optical systems. The ability to add magnetic and

power semiconductor models makes it suitable for power systems. The list is endless.

Mechanical, thermal, acoustic, fluidic, etc. models are all possible. These capabilities

are being used to model Micro-Electro-Mechanical Systems (MEMS), where multi-

disciplinary components are constructed on the same silicon die. Even new electrical

models, such as varactors, PIN diodes, etc. can be added to allow simulation of a

wider variety of purely electrical systems.

In addition, as discussed in the remainder of this chapter, Verilog-A/MS can be used

to add models of high-level blocks, allowing larger systems to be simulated; it allows

models of digital components to be added, allowing simulation of mixed-signal sys-

tems; and it allows modeling of complicated test benches; allowing for more sophisti-

cate

tests.

4.1.1

Compact Models in Verilog-A

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