xiv Preface
and references. The purpose of the rst part is to introduce the vision implementation methodology, the
Verilog HDL for image processing, and the Verilog HDL simulator for designing the vision architecture.
Chapter 1 deals with the taxonomy of the general and specialized algorithms and architectures that are
considered typical in vision technology. The pros and cons of the different implementations are discussed,
and the dedicated implementation by Verilog HDL design addressed. Chapter 2 introduces the basics of
Verilog HDL and coding examples for communication and control modules. These modules are general
building blocks for designing vision architectures. Chapter 3 introduces Verilog circuit modules, such as
processor, memory, and pipelined array, which are the building blocks of the vision architectures. The
vision architectures are designed using processors, memories, and possibly pipelined arrays, connected
by the communication and control modules. Chapter 4 introduces the Verilog vision simulators, specially
built for designing vision architectures. The simulator consists of the unsynthesizable module, which
functions as an interface for image input and output, and the synthesizable module, which is a platform
for building serial and parallel architectures. This platform is tailored to the specic architectures in later
chapters.
The second part, comprising Chapters 5–7, introduces the fundamentals of intermediate vision algo-
rithms. Instead of treating diverse elds in vision research, this part focuses on the energy minimization,
stereo, motion, and fusion of vision modules. Chapter 5 introduces the energy function, which is a
common concept in computer vision algorithms. The energy function is explained in terms of Markov
random eld (MRF) estimation and the free energy concept. The energy minimization methods and the
structure of a typical energy function are also explained. Chapter 6 is dedicated to stereo vision. Instead
of surveying the extensive research done, this chapter focuses on the constraints and energy minimiza-
tion. A typical energy function that is subsequently designed with various architectures is discussed.
Chapter 7 deals with motion estimation and fusion of vision modules. Instead of an extensive survey, this
chapter focuses on the motion principles and the continuity concept that unify the various constraints in
motion estimation. This chapter also deals with the fusion of vision modules, directly with intermediate
variables, bypassing the 3D variables, which give strong constraints for determining the intermediate
vision variables. This chapter closes with a set of equations linking the 2D variables directly, i.e. blur
diameter, surface normal, disparity, and optical ow.
The third part, which comprises Chapters 8–10, introduces the algorithms and architectures of the
major algorithms: relaxation, dynamic programming (DP), belief propagation (BP), and graph cuts (GC).
The computational structures and possible implementations are also discussed. Chapter 8 introduces the
concept underlying the relaxation algorithm and architecture. In addition to the Gauss–Seidel and Jacobi
algorithms, this chapter introduces other types of architectures: specically, extensions to the Gauss–
Seidel–Jacobi architecture. In Chapter 9, the concept underlying the DP algorithm and architecture is
introduced, and the computational structures of various DP algorithms discussed. Finally, the algorithms
and architectures of BP and GC are addressed in Chapter 10, and their computational structures and
possible implementations discussed.
The fourth part, which comprises Chapters 11–14, is dedicated to the Verilog design of stereo matching
with the major architectures: relaxation, DP, and BP. All the designs are provided with complete Verilog
HDL codes that have been veried by function simulation and synthesis. Chapter 11 addresses the Verilog
design of the relaxation architecture. Chapter 12 deals with the Verilog design of serial architectures for
the DP. The design is aimed at executing stereo matching with the serial vision simulator. Chapter 13 intro-
duces the systolic array in Verilog HDL. This chapter explains in detail how to design the control module
and the systolic array, connected by local neighborhood connections. Finally, Chapter 14 deals with BP
design for stereo matching. This chapter also explains in detail the design methods with Verilog HDL.
All the designs are accompanied by complete source codes that have all been proven correct via
simulation and synthesis tests. A package of the codes in the textbook, and the complementary codes, is
provided separately for readers. The codes are carefully provided with the general constructs in standard
Verilog HDL, which is free from IPs and vendor-dependent codes. I hope that this book will provide
an important opportunity that stirs the reader’s ability to develop more advanced vision architectures