CHAPTER 17 Platform Debug ...................................................................... 465
Debugging New Platforms ...................................................................... ............ 465
A Process for Debugging a New Platform ......................................................... 466
Debug Tools and Chipset Features...................................................................... 467
Oscilloscopes............... .................................................................................... 468
Logic Analyzers .................................................................................. ............ 468
Bus Analyzers ................................................................................................. 468
Power-On Self-Test (POST) Cards................................................................. 468
JTAG Adapters ................................................................................................ 469
Debug Process Details......................................................................................... 469
Visual Examination......................................................................................... 469
Hardware Evaluation....................................................................................... 470
Software Evaluation........................................................................................ 474
Additional Resources.................................................................................... ....... 474
Summary....................................................................................................... ....... 475
CHAPTER 18 Performance Tuning ............................................................... 477
What Are Patterns?.............................................................................................. 477
General Approaches ............................................................................................ 478
Defined Performance Requirement................................................................. 478
Performance Design........................................................................................ 478
Premature Code Tuning Avoided ................................................................... 479
Step-by-Step Records...................................................................................... 479
Slam-Dunk Optimization ................................................................................ 480
Best Compiler for Application ........................................................... ............ 480
Compiler Optimizations......................... ......................................................... 481
Data Cache .......................................................................................... ............ 482
Code and Design ................................................................................................. 483
Reordered Struct ................................................................................. ............ 483
Supersonic Interrupt Service Routines ........................................................... 483
Assembly-Language-Critical Functions ......................................................... 484
Inline Functions............... ................................................................................ 484
Cache-Optimizing Loop.................................................................................. 484
Minimizing Local Variables ........................................................................... 485
Explicit Registers ............................................................................................ 485
Optimized Hardware Register Use ................................................................. 485
Avoiding the OS Buffer Pool.......................................................................... 486
C Language Optimizations ............................................................................. 486
Disabled Counters/Statistics ........................................................................... 487
Processor-Specific.................................................................................... ............ 488
Stall Instructions ............................................................................................. 488
Profiling Tools........................................ ......................................................... 488
Prefetch Instructions ........................................................................... ............ 489
xvi Contents