KeyStone架构多核导航器用户指南——CPPI与Event Machine

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"KeyStone Architecture Multicore Navigator User Guide - cppi.pdf 是TI公司的一份技术文档，专注于介绍Event Machine（EM）的前身——Control Plane Protocol Interface (CPPI)技术。文档阐述了如何使用Queue Manager Subsystem (QMSS) 和 Packet DMA (PKTDMA) 来管理和实现设备内部高速数据包的移动，从而显著减轻设备DSPs的内部通信负担，提升整体系统性能。" TI的KeyStone架构是一种多核处理器架构，旨在提供高性能和低功耗的解决方案，特别是在信号处理和嵌入式计算领域。Multicore Navigator用户指南详细介绍了该架构下的数据传输机制。 QMSS（Queue Manager Subsystem）是一个关键组件，它负责管理和调度数据在不同核心之间的传输。它包含了队列、队列映射表和控制逻辑，确保数据包的高效有序流动，同时减少了对CPU资源的需求。 PKTDMA（Packet DMA）则是一个专用的DMA引擎，设计用于高速、低延迟的数据包传输。PKTDMA可以在不占用CPU资源的情况下，直接在内存和外部接口之间搬移数据包，提高了系统的吞吐量。文档中的"Release History"部分展示了自2010年12月到2011年2月的更新内容，包括添加警告注释、改进队列映射表、新加入的质量保证（QoS）部分、PDSP部分的重新组织以及附录A中工具函数的更新等。这些更新旨在提高文档的清晰度，增强功能，并解决潜在问题。在系统设计中，理解CPPI的工作原理对于优化KeyStone架构的多核系统性能至关重要。通过熟悉QMSS和PKTDMA的交互方式，开发者可以更好地理解和配置数据路径，从而实现更高效的数据处理和通信。此外，文档还强调了跨L2缓存传输时的注意事项，AIF单片模式下的自动传输，以及QoS固件在确保服务质量方面的角色。这份TI的技术文档是学习和理解KeyStone架构下数据包管理与传输机制的重要参考资料，特别是对那些想要深入研究Event Machine或者多核系统优化的工程师来说。通过详细阅读和理解这份文档，开发者能够提升其在多核处理器环境中设计和调试软件的能力。

1.1 Terminology Used in This Document

1-2 KeyStone Architecture Multicore Navigator User Guide SPRUGR9B—February 2011

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Chapter 1—Introduction

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1.1 Terminology Used in This Document

Table 1-1 defines the important acronyms used in this document.

1.2 Features

Multicore Navigator provides the following features:

• One hardware queue manager, including:

– 8192 queues (some dedicated for specific use)

– 20 memory regions (for descriptor storage)

– 2 linking RAMs

• Six PKTDMAs, one located in each of the following subsystems:

– QMSS (infrastructure, or core-to-core PKTDMA)

– AIF2

– FFTC A and B

– PA

– SRIO

• Multi-core host notification via interrupt generation (accumulator functionality)

Multicore Navigator was developed based on the design goals while incorporating ideas

from leading-edge architectures for Ethernet, ATM, HDLC, IEEE1394, 802.11, and

USB communications modules.

Some general features of Multicore Navigator:

• Centralized buffer management

• Centralized packet queue management

• Protocol-independent packet-level interface

Table 1-1 Terminology

Acronym Definition

AIF2 Antenna interface subsystem

CPPI Communications port programming interface (Multicore Navigator)

EOP End of packet

FFTC FFT coprocessor subsystem

FDQ Free descriptor queue

MOP Middle of packet

PA, PASS Packet accelerator subsystem

PDSP Packed data structure processor

PKTDMA Packet DMA, consisting of two independent halves: Rx DMA and Tx DMA

(previously was CDMA for CPPI DMA -- this is obsolete)

PS Protocol specific

QM Hardware queue manager

QMSS Queue manager subsystem

Rx DMA Rx half of the PKTDMA

SOP Start of packet

SRIO Serial rapid I/O subsystem

Tx DMA Tx half of the PKTDMA

End of Table 1-1

1.4 Overview

1-4 KeyStone Architecture Multicore Navigator User Guide SPRUGR9B—February 2011

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1.4 Overview

Multicore Navigator specifies the data structures used by Texas Instruments standard

communications modules to facilitate Direct Memory Access (DMA) and to provide a

consistent Application Programming Interface (API) to the host software in multi-core

devices. The data structures and the API used to manipulate them will be jointly

referred to as Multicore Navigator.

Frequent tasks are commonly offloaded from the host processor (DSP core) to

peripheral hardware to increase system performance. Significant performance gains

may result from careful design of the host software and communication module

interface. In networking systems, packet transmission and reception are critical tasks.

Texas Instruments has developed the Multicore Navigator standard, which is aimed at

maximizing the efficiency of interaction between the host software and

communications modules.

The design goals for Multicore Navigator are as follows:

• Minimize host interaction

• Maximize memory use efficiency

• Maximize bus burst efficiency

• Maximize symmetry between transmit/receive operations

• Maximize scalability for number of connections / buffer sizes / queue sizes /

protocols supported

• Minimize protocol specific features

• Minimize complexity

1.5 Architecture

As shown in Figure 1-1, Multicore Navigator is made up of the following blocks:

• Queue manager subsystem, containing:

– Queue manager

– PKTDMA for infrastructure (core-to-core) use

– Two PDSPs for running accumulation/monitoring firmware. Possible

configurations for each PDSP are:

› High priority accumulator using 16 channels

› High priority accumulator using 32 channels

› High and low priority accumulators using 32 “high” channels and 16

“low” channels

– Two timers (one for each PDSP)

• A PKTDMA in each of the following IP:

– AIF2 (Antenna Interface)

– FFTC (FFT Coprocessor)

– PA (Packet Accelerator)

– SRIO (Serial Rapid IO)

– BCP (Bit Coprocessor, TCI6618 only)

1.6 Queue Manager

SPRUGR9B—February 2011 KeyStone Architecture Multicore Navigator User Guide 1-5

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1.6 Queue Manager

The queue manager is a hardware module that is responsible for accelerating

management of the packet queues. Packets are added to a packet queue by writing the

32-bit descriptor address to a particular memory mapped location in the queue

manager module. Packets are de-queued by reading the same location for that

particular queue. Multicore Navigator queue manager modules are capable of queuing

only descriptors that have been allocated from the descriptor regions of the associated

queue manager.

1.7 Packet DMA (PKTDMA)

The Packet DMA is a DMA in which data destination is determined by a destination

and free descriptor queue index, not an absolute memory address. In receive mode, the

PKTDMA fetches a free descriptor, traverses the descriptor to find the buffer,

PKTDMA transfers the payload into the buffer, and puts the descriptor into the

destination queue. In transmit mode, the PKTDMA pops the descriptor from the

queue, traverses the descriptor, reads the payload from the buffer, and DMA transfers

the payload to the transmit port.

1.8 Accumulator

Within the QMSS are two PDSPs, each running firmware that performs accumulation

functions. This firmware is known as the accumulator. The accumulator’s job is to poll

a select number of queues looking for descriptors that have been pushed into them.

Descriptors are popped from the queue and placed in a buffer provided by the host.

When the list becomes full or a programmed time period expires, the accumulator

triggers an interrupt to the host to read the buffer for descriptor information.

There are up to 32 channels in the high priority accumulator. Each channel triggers its

own interrupt and polls either a single queue or up to 32 contiguous queues. Specific

interrupt and queue assignments are listed later in this document.

There are up 16 channels in the low priority accumulator. Each channel triggers its own

interrupt, and polls up to 32 contiguous queues. All low priority channel interrupts

route to all DSP cores. Specific interrupt and queue assignments are listed later in this

document.

The timer periods for polling queues and for host interrupt triggering are

programmable.

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KeyStone架构多核导航器用户指南——CPPI与Event Machine

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sudo keystone-manage fernet_setup --keystone-user keystone --keystone-group keystone

Failed to start openstack-keystone.service: Unit not found.

bash: /usr/share/keystone/wsgi-keystone.conf: 权限不够

Job for openstack-keystone.service failed because the control process exited with error code

在 controller 节点上使用 iaas-install-keystone.sh 脚本安装 Keystone 服务。安装完成后，使用相关命 令，创建用户 chinaskill，密码为 000000。

keystone-manage fernet_setup --keystone-user keystone --keystone-group keystone

source /etc/keystone/admin-openrc.sh的意思

2.使用提供的脚本框架iaas-install-mysql.sh，填充脚本，在 controller 节点上安装mariadb、 mencached、rabbitmq 等服务并完成相关配置。

最新资源

在 controller 节点上使用 iaas-install-keystone.sh 脚本安装 Keystone 服务。安装完成后，使用相关命令，创建用户 chinaskill，密码为 000000。