LVDS技术详解：从基础知识到差分信号应用

需积分: 26 46 浏览量更新于2024-07-17 收藏 938KB PDF 举报

"LVDS英文原版教材，深入讲解差分信号原理与应用，适合硬件领域学习者" 在电子通信领域，LVDS（Low Voltage Differential Signaling，低电压差分信号）是一种广泛使用的高速数据传输技术。本教材深入探讨了差分信号的基础，包括其优势和实现条件，同时提供了关于如何优化差分连接的实用建议。首先，教材从单端电路（Single-Ended Circuits）的基本概念入手。单端电路是通信的基础，如图6.1所示，剪刀切断了电路，导致通信中断。只有当顶部开关闭合且底部导线连接时，灯泡才会亮起，这表明电流只能在闭合的回路中流动。这一简单的例子说明了集中元件电路操作的一个关键原则：电流仅在完整的环路中流动。接下来，教材会扩展到差分信号分析。差分信号是通过一对互相耦合的导线传输，其中每个导线上的信号相对于另一个导线呈现相反的极性。这种设计提供了一些显著的优势，比如： 1. **抗干扰能力**：由于信号在一对导线中成对传输，外部噪声通常会对两条线路产生相同的影响，从而在接收端可以通过比较两个信号的差异来消除噪声。 2. **更高的数据速率**：差分信号可以以更低的电压摆幅实现更高的数据传输速率，因为它们依赖于信号之间的相对变化，而非绝对电平。 3. **更好的信号完整性**：差分信号能减少串扰，因为相邻的信号线之间的电磁耦合会使得干扰相互抵消。 4. **更低的功耗**：相比于单端信号，差分信号通常需要较低的电源电压，从而降低了功耗。教材还详细讨论了如何在实际应用中设计和管理差分连接，包括信号匹配、回路阻抗控制、信号线对的布局以及共模抑制比（CMRR）等重要参数的考虑。这些实践指南对于硬件工程师来说至关重要，因为他们需要确保在复杂的系统中正确地实现LVDS信号传输，以保证系统的稳定性和性能。 "LVDS英文原版教材"是硬件设计人员深入理解和掌握差分信号技术的理想资料，它不仅涵盖了理论基础，还包括了大量的实践经验，对于提升在高速数字通信系统设计中的技能具有极大的帮助。通过学习，读者将能够更好地应对高速数据传输中的挑战，并设计出更高效、更可靠的硬件系统。

6.4 ▪ Differential and Common-Mode Voltages 375

2bcd=− [6.5]

In a good differential system one usually strives to limit the AC component of the common-

mode signal. This is done because the common-mode portion of the transmitted signal does

not enjoy any of the noise-canceling or radiation-preventing benefits of differential

transmission. The common-mode and differential signals also propagate differently in most

cabling systems, which can lead to peculiar skew or ringing problems if the common-mode

component is an appreciable fraction of the overall signal amplitude, especially if those

common-mode currents are accidentally converted into differential signals (see Section 6.8,

“Differential to Common-Mode Conversion”). Intercabinet cabling, particularly, is

extremely sensitive to the presence of high-frequency common-mode currents, which radiate

quite efficiently from unshielded cabling.

Another decomposition of the two-wire transmission problem defines odd-mode and

even-mode voltages and currents. These are similar to, but slightly different from,

differential and common-mode voltages and currents.

An odd-mode signal is one that has amplitude x(t) on one wire and the opposite signal

–x(t) on the other wire. A signal with an odd-mode amplitude of x(t) has a differential

amplitude of 2x(t). If the signal x(t) takes on a peak-to-peak range of y, then the peak-to-

peak odd-mode range is simply y, but the peak-to-peak differential amplitude is 2y.

An even-mode signal is the same on both wires. An even-mode signal with a peak-to-

peak range of y also has a peak-to-peak common-mode range of y. The even-mode

amplitude and common-mode amplitude are one and the same thing.

Two-wire transmission systems sometimes send a signal voltage on one wire, but

nothing on the other. In this case the differential-mode amplitude equals the signal

amplitude on the first wire. The common-mode amplitude is half that value. In this case the

odd-mode and even-mode amplitudes are the same and both equal to half the signal

amplitude on the first wire.

Here are the translations between odd-mode and even-mode quantities. The same

decomposition applies to currents.

Odd-mode signal:

−

 [6.6]

Even-mode signal:

 [6.7]

Signal on first wire:

aeo=+ [6.8]

Signal on second wire:

beo=− [6.9]

where a and b represent the voltages on the two wires with respect to a common

reference.

The differential-and-common-mode decomposition and the even-and-odd mode

decomposition share very similar definitions. The discrepancy between the two models has

6.6 ▪ Common-Mode Balance 377

not very great as long as there is not much coupling between the modes (see Section 6.8)

and as long as the receiver remains sensitive only to the differential component of the signal.

It is theoretically possible to observe deleterious effects from the difference in velocities

under the following circumstances:

 A differential signal is created.

 Part of the signal is inadvertently converted to a common-mode signal.

 The differential-mode and common-mode signals propagate independently,

and with slightly different velocities, to the far end of a long transmission

line.

 The common-mode signal is inadvertently converted back to a differential-

mode signal.

In this case the receiver will perceive a superposition of two incident waveforms with

slightly different timing and amplitudes (the double-converted signal presumably being

smaller).

POINT TO REMEMBER

 Microstrips support slightly different propagation velocities for the

differential and common modes. The impact of this difference is not very

great.

6.6 COMMON-MODE BALANCE

Common-mode balance is a term that applies to a differential transmission system.

Common-mode balance is the ratio of common-mode to differential-mode signal amplitudes

within the system. A perfectly differential system with no common-mode component is

perfectly balanced (i.e., the signals on the two wires are exactly antipodal, or opposite).

When calculating the common-mode balance ratio, it is common to refer only to the

AC component of the common-mode signal. For example, a perfectly complementary pair

of TTL 3.3-V signals may share a common-mode DC offset of 1.65 volts, but the common-

mode AC voltage (the changing part) might still be very small.

The common-mode balance ratio is often expressed in decibels. A common-mode

balance of 1 part in 10,000 (–80dB) is exceptionally good. Digital logic parts sold as

differential transmitters may exhibit common-mode balance of perhaps only –30 dB or even

–20 dB.

Some authors express the common-mode balance in terms of the even-mode to odd-

mode signal amplitude. The even-to-odd mode amplitude ratio is half the common-to-

differential mode amplitude ratio, making it 6dB less impressive-sounding. An older term

used to describe the common-mode to differential-mode amplitude ratio is longitudinal

balance.

378 Chapter 6 ▪ Differential Signaling

POINT TO REMEMBER

 Common-mode balance is the ratio of common-mode to differential-mode

signal amplitudes.

6.7 COMMON-MODE RANGE

Every digital receiver comes with a specification for its common-mode input range. You are

expected to ensure that input signals remain within this range at all times. As long as both

inputs stay within the common-mode operating range, the component will meet or exceed its

specification for the input switching threshold. Beyond that, manufacturers give few clues as

to how the component will operate. It may operate normally. On the other hand, it may

reverse its outputs, it may saturate and take a long time to recover, it may lock up into a

brain-damaged state until power-cycled, or it may permanently fail. You never know which

[55]. Don’t violate this specification (even for a brief period).

The common-mode range specification is definitely useful, but I’d like to know more

about a receiver. For example, let’s say you are receiving a 500-mV differential clock input.

Add to each signal a common-mode noise voltage of 1-V p-p. How much jitter will come

out of the clock? You can’t figure that out from the specifications.

Another source of clock jitter is noise from the power supply. Suppose there is a 100-

mV AC ripple on V

. How much jitter will you get? You can’t figure that out from the

specifications, either.

Both examples deal with the issue of common-mode rejection, which is one measure

of how much the input switching threshold changes in response to a defined noise input. For

linear amplifiers, it’s common to see a common-mode rejection ratio (CMRR) specification

for common-mode noise at the input terminals and also for noise at the power terminals. For

example, a CMRR of –50 dB for V

means that a 100-mV ripple on V

will have the

same effect as an equivalent differential noise source of 0.3 mV (that’s 100-mV less 50 dB).

The CMRR translates each type of noise into an equivalent differential noise level at the

input. You can then add up all the equivalent input noise figures to determine the overall

signal-to-noise ratio, or jitter performance, of your system.

The common-mode range specification used in digital comparators and receivers

doesn’t break down the sources of noise, so there’s no way to do jitter analysis.

POINT TO REMEMBER

 Don’t violate the common-mode input range specification for a receiver (not

even briefly).

6.8 DIFFERENTIAL TO COMMON-MODE CONVERSION

Any imbalanced circuit element within an otherwise well-balanced transmission channel

creates a region of partial coupling between the differential and common modes of

剩余75页未读，继续阅读

qq_38614075

粉丝: 3
资源: 3

LVDS技术详解：从基础知识到差分信号应用

OpenLDI.pdf

LVDS标准（VASA和JEIDA）

lvds与sublvds

lvds标准协议 pdf

lvds dual 和lvds single 什么区别

FPGA 区分HP BANK LVDS /HR BANK LVDS

miini-LVDS与LVDS的区别

LVDS和sub-LVDS有啥区别

2.5V LVDS接口能否接收1.8V LVDS信号

LVDS和sub-LVDS的区别？

最新资源