Abstract-- This paper discusses the implementation of
modulation chains for multi-standard communications on
a dynamically and partially reconfigurable heterogeneous
platform. Implementation results highlight the benefit of
considering a DSP/FPGA platform instead of a multi-DSP
platform since the FPGA supports efficiently intensive
computation components, which reduces the DSP load.
Furthermore, partial dynamic reconfiguration increases
the overall performance as compared to total dynamic
reconfiguration since there is 45% of bitstream size
reduction, which leads to a 45% decrease of the whole
reconfiguration time. The implementation of modulation
chains for multi-standard communications proves the
availability of new technology to support efficiently
Software Defined Radio.
Index terms-- HW/SW CoDesign, baseband data
processing, partial dynamic reconfiguration, Software
Defined Radio.
I. INTRODUCTION
In this paper we present a reconfigurable architecture for
a wireless Universal Terminal. The idea of a re-
configurable terminal first appeared in the military area.
In fact, the need for reconfiguration appeared very soon in
the 70’s, with, for example, the first equipment called
“SPEAKeasy” [1]. This concept became popular in the
civil telecommunications area in the 90’s, thanks mainly
to the work of J. Mitola [2].
There is now a growing interest in reconfigurable
terminals. This sector, whatever the technique used to
offer reconfigurability, is one of the fastest growing
sectors in the telecommunications industry. But it should
be noted that this topic is also a logical consequence of
the performance increase of DSPs and FPGAs and is in
line with the historical evolution of the replacement of
analog parts by digital parts. DSPs and FPGAs provide
the flexibility and the computational power required to
realize a Digital Front End (DFE). FPGAs enable to take
advantage of parallelism to achieve high performance
with moderate power consumption. Furthermore FPGAs
can be reconfigured in order to provide multi
standard/service terminals.
In particular, one can imagine a given device that should
support several digital mobile telephony services, digital
broadcasting services, and/or digital data transfer services
by just changing its software. Current devices can provide
only one type of service due to limitations (inflexibility)
mainly imposed by their analog technology parts. This
explains the growing interest in multi-mode terminals
based on Software Defined Radio (SDR) techniques.
Software Defined Radio basically refers to a set of
techniques that permit the reconfiguration of a
communication system without the need to change any
hardware system element. The goal of Software Defined
Radio is to produce communication devices capable of
supporting several different services. These terminals
must adapt their hardware in function of the wireless
networks such as GSM, IS95, PDC, DECT, PHS and the
future UMTS. In addition they should take into account
wireless LAN standards like IEEE 802.11a/b/g and
Hiperlan, as well as digital broadcasting standards like
DAB and DVB-T.
The very important point is the fact that this adaptation
should be dynamic, more or less in real time, in order to
take into account all the variations.
The contribution of this work is to prove the feasibility of
dynamic and partial reconfiguration on a heterogeneous
platform composed of one DSP TI C6201 and a Xilinx
Virtex 1000E FPGA. To realize this implementation we
have focussed on the application, the platform and the
design flow, which is an essential issue when making the
Software Defined Radio approach achievable.
The paper is arranged as follows: Section 2 reviews
previous work related to Software Defined Radio. Section
3 focuses on FPGA technology and particularly on
reconfiguration requirements. Section 4 looks at the
details of the experimentation platform used to perform
this study. This provides the necessary background for an
appreciation of the design flow and the case study that are
described in sections 5 and 6. Section 7 presents future
work and concludes the paper.
II. RELATED WORK
This section presents the concept of reconfiguration in
both domains, application and architecture involved in the
Software Defined Radio paradigm.
The concept of Software Defined Radio is closely related
to the need of further flexibility imperative for future
terminals. As explained by Polydoros et al. [3] the
flexibility of a terminal requires the system to be adaptive
and reconfigurable. The system is adaptive if it can
SOFTWARE RADIO AND DYNAMIC
RECONFIGURATION ON A DSP/FPGA PLATFORM
J. P. Delahaye
1
, G. Gogniat
2
, C. Roland
2
, P. Bomel
2
1
IETR/Supelec - Campus de Rennes, Av. de la Boulais, BP 81127
35511 Cesson-sévigné France
jean-philippe.delahaye@supelec.fr
2
Laboratoire LESTER – Université de Bretagne Sud - CNRS FRE 2734
Centre de Recherche, BP 92116, 56321 Lorient France
{ guy.gogniat | christian.roland | pierre.bomel}@univ-ubs.fr