11. CONTROL AND STATUS REGISTERS 状态寄存器
The Read Status Register-1 and Status Register-2 instructions can be used to provide status on
the availability of the Flash memory array, if the device is write enabled or disabled, the state of write
protection and the Quad SPI setting.
The Write Status Register instruction can be used to configure the devices write protection
features and Quad SPI setting.
Write access to the Status Register is controlled by the state of the non-volatile Status Register
Protect bits (SRP0, SRP1), the Write Enable instruction, and in some cases the /WP pin. 写入
“状态寄存器”的权限,由SRP0、SRP1比特位、写能指令、WP脚 来控制。
11.1 STATUS REGISTER 状态寄存器(有寄存器1和寄存器2,比特位S0~S15)
11.1.1 BUSY 忙(只读)
BUSY is a read only bit in the status register (S0) that is set to a 1 state when the device is
executing a Page Program, Sector Erase, Block Erase, Chip Erase or Write Status Register
instruction. BUSY是“只读”比特位S0,当芯片忙时,会设置成1。
During this time the device will ignore further instructions except for the Read Status Register and
Erase Suspend instruction (see tW, tPP, tSE, tBE, and tCE in AC Characteristics).
When the program, erase or write status register instruction has completed, the BUSY bit will be
cleared to a 0 state indicating the device is ready for further instructions.
11.1.2 Write Enable Latch (WEL) 写能(只读)
Write Enable Latch (WEL) is a read only bit in the status register (S1) that is set to a 1 after
executing a Write Enable Instruction. WEL是“只读”比特位S1,当执行了写能指令后,就会被
设置成1。
The WEL status bit is cleared to a 0 when the device is write disabled. 当芯片为禁止写入时,
WEL是设置成0。
A write disable state occurs upon power-up or after any of the following instructions: Write Disable,
Page Program, Sector Erase, Block Erase, Chip Erase and Write Status Register. 当上电、或在以下
指令操作之后,芯片会变成禁止写入状态(WEL=0):写入禁止指令、页面编程、扇区擦除、块擦除、
芯片擦除、写状态寄存器指令。
11.1.3 Block Protect Bits (BP2, BP1, BP0) 保护范围设定(可读写)
The Block Protect Bits (BP2, BP1, BP0) are non-volatile read/write bits in the status register (S4,
S3, and S2) that provide Write Protection control and status. BP2, BP1, BP0 是非易失、可读写比
特位
Block Protect bits can be set using the Write Status Register Instruction (see tW in AC
characteristics). 用写状态寄存器指令来写这些比特。
All, none or a portion of the memory array can be protected from Program and Erase instructions
(see Status Register Memory Protection table).
The factory default setting for the Block Protection Bits is 0, none of the array protected. 出厂默
认值是0。
11.1.4 Top/Bottom Block Protect (TB) 从顶/底开始保护(可读写)
The non-volatile Top/Bottom bit (TB) controls if the Block Protect Bits (BP2, BP1, BP0) protect
from the Top (TB=0) or the Bottom (TB=1) of the array as shown in the Status Register Memory
Protection table. 0是从顶开始,1是从底开始
The factory default setting is TB=0. 出厂默认值是0。