深入理解ARMv8汇编语言：现代32/64位与SIMD编程指南

Armv8

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■ INTRODUCTION

xviii

Target Audience

The target audience for this book is software developers including:

• Software developers who are creating programs for Armv8-A platforms and want

to learn how to code performance-enhancing algorithms and functions using the

Armv8-A 32-bit and 64-bit instruction sets

• Software developers who need to learn how to write SIMD functions or accelerate

the performance of existing code using the Armv8-A 32-bit and 64-bit SIMD

instruction sets

• Computer science/engineering students and hobbyists who want or need to gain a

better understanding of the Armv8-A platform and its SIMD architecture

Readers of this book should have previous high-level language programming experience and a basic

understanding of C++. Should you desire to run or modify any of the source code examples published in

this book, a smidgen of familiarity with Linux and the GNU toolchain will be helpful. However, previous

experience with Linux and the GNU toolchain is not necessary to benefit from this book.

Content Overview

The primary objective of this book is to help you learn Armv8-A 32-bit and 64-bit assembly language

programming. The book’s chapters and content are structured to achieve this goal. Here is a brief overview

of what you can expect to learn.

Armv8-32 Architecture Chapter 1 introduces Armv8-A and the AArch32 execution state. It includes

a discussion of fundamental data types, internal architecture, register sets, instruction operands, and

memory addressing modes. Chapters 2, 3, and 4 explain the fundamentals of Armv8-32 assembly language

programming using the A32 instruction set and common programming constructs including arrays and

structures. The source code examples presented in these (and subsequent) chapters are packaged as

working programs, which means that you can run, modify, or otherwise experiment with the code to

enhance your learning experience.

Armv8-32 Floating-Point Programming Chapter 5 examines the floating-point resources of the

AArch32 execution state. It also covers important floating-point programming concepts. Chapter 6 explains

how to perform scalar floating-point arithmetic using single-precision and double-precision values.

Armv8-32 SIMD Programming Chapter 7 describes Armv8-32 SIMD resources including register

sets, data types, and the instruction set. It also includes a short primer on SIMD programming techniques.

Chapters 8 and 9 cover Armv8-32 SIMD programming using packed integer and packed floating-point

operands.

Armv8-64 Architecture Chapter 10 introduces the AArch64 execution state. This chapter expounds

relevant data types, architectural features, general-purpose and SIMD register sets, and memory addressing

modes. Chapters 11 and 12 describe the fundamentals of Armv8-64 assembly language programming using

the A64 instruction set.

Armv8-64 Floating-Point Programming Chapter 13 demonstrates how to perform scalar

floating-point arithmetic using the A64 instruction set.

Armv8-64 SIMD Programming Chapters 14 and 15 delve into the details of the Armv8-64 SIMD

architecture. These chapters contain a variety of programming examples that illustrate how to use the A64

instruction set to carry out calculations using packed integer and packed floating-point operands.

Armv8-64 Advanced Programming Chapter 16 includes source code examples that illustrate how

to perform sophisticated arithmetic calculations using the A64 SIMD instruction set. Chapter 17 outlines

specific coding strategies and techniques that you can use to boost the performance of your Armv8 assembly

language code.

■ INTRODUCTION

xix

Appendices Appendix A describes how to build and execute the source code examples using a

Raspberry Pi 4 Model B and the GNU toolchain. Appendix B contains a list of this book’s references and

additional resources that you can consult for more information about Arm assembly language programming.

Source Code

Download information for this book’s source code is available on the Apress website at www.apress.com/us/

book/978-1484262665. You can also access the source code on GitHub at www.github.com/apress/

modern-arm-assembly-language-programming.

■ Caution The sole purpose of the source code is to elucidate programming examples that are directly

related to the topics discussed in this book. Minimal attention is given to essential software engineering

concerns such as robust error handling, security risks, numerical stability, rounding errors, or ill-conditioned

functions. You are responsible for addressing these concerns should you decide to use any of the source code in

your own programs.

Some of the source code examples presented in this book are adaptations of the source code examples

first published in Modern X86 Assembly Language Programming and Modern X86 Assembly Language

Programming, Second Edition. If you have read one of these books or have previous X86 assembly language

programming experience, perusing this book will strengthen your overall programming proficiency and

versatility since it explains assembly language programming for a processor architecture with a RISC

heritage.

Terminology

The Arm technical documentation uses its own nomenclature to elucidate different aspects of Arm’s

technology including Armv8, Armv8-A, AArch32, AArch64, A32, and A64. These terms have precise

meanings that you will learn about in Chapter 1. When explaining or referencing general features of Armv8

32-bit and 64-bit technology, this book uses the terms Armv8-32 and Armv8-64, respectively.

Additional Resources

An extensive set of programming documentation is available from Arm. Appendix B lists several important

resources that both aspiring and experienced Arm assembly language programmers will find useful.

Of all the resources listed in Appendix B, the most valuable reference is the Arm Architecture Reference

Manual (Armv8, for Armv8-A architecture profile), which can be downloaded from the Arm website using

the URL that is shown in the aforementioned appendix. This 8000+ page tome contains comprehensive

programming information for every A32 and A64 instruction including detailed operational descriptions,

lists of valid operands, affected condition flags, and potential exceptions. You are strongly encouraged to

consult this indispensable resource when developing your own Armv8-A assembly language code to verify

correct instruction usage.

D. Kusswurm, Modern Arm Assembly Language Programming,

https://doi.org/10.1007/978-1-4842-6267-2_1

CHAPTER 1

Armv8-32 Architecture

Chapter 1 introduces the Armv8 computing architecture and the AArch32 execution state as viewed from the

perspective of an application program. It begins with a brief overview of the Armv8 computing architecture,

which provides a frame of reference for subsequent content. This is followed by a review of fundamental,

numerical, and single-instruction multiple-data (SIMD) data types. Programming details of the AArch32

execution state are examined next and include descriptions of the general-purpose registers, condition flags,

instruction operands, and memory addressing modes.

Unlike high-level languages such as C and C++, assembly language programming requires the software

developer to comprehend specific architectural features of the target processor before attempting to

write any code. The topics discussed in this chapter fulfill this requirement and provide a foundation for

understanding the source code that is presented later in this book. This chapter also provides the base

material that is necessary to understand the SIMD capabilities of the AArch32 execution state.

Armv8 Overview

Arm Limited (“Arm”) designs and licenses computing architectures to third parties who incorporate

their intellectual property into physical processors or products for sale to consumers. Arm computing

architectures are embedded in a myriad of industrial control systems, IoT devices, and consumer products

with the most notable being the ubiquitous smartphone. Since its inception, Arm has released eight major

versions of its computing architecture. The latest major version is called Armv8 and supports both 32-bit

and 64-bit execution states. Armv8-compliant processors are required (except in rare instances) to include

hardware support for floating-point arithmetic and SIMD operations. Since the release of Armv8in 2013,

Arm has announced several architecture extensions. These extensions, which are denoted by a .x suffix,

supplement the base architecture with additional computing features and resources. For example, the

Armv8.2-FP16 extension adds instructions that perform half-precision floating-point arithmetic.

The Armv8 computing architecture is a reduced instruction set computing (RISC) platform. Like many

RISC platforms, Armv8 supports a versatile set of elementary fixed-length instructions. It also implements

a load/store memory architecture. In a load/store memory architecture, program code uses dedicated

instructions to load data from memory into the processor’s internal registers. A function then performs any

required arithmetic or processing operations using only the values in these registers as operands. Results are

then saved to memory using corresponding store instructions.

Arm defines distinct Armv8 architecture profiles for specific use cases. The Armv8-A profile targets

mainstream computing applications and includes two discrete execution states. The AArch32 execution

state uses 32-bit wide registers and 32-bit memory addressing. It also supports two similar but slightly

different instruction sets: A32 and T32. In the A32 instruction set, all instruction encodings are 32 bits in

length. Programs can use A32 assembly language instructions to fully exploit the processing capabilities of

Chapter 1 ■ armv8-32 arChiteCture

the AArch32 execution state. The T32 instruction set is an older instruction set that employs both 16- and 32-

bit wide instruction encodings. The AArch32 execution state allows runtime switching between the A32 and

T32 instruction sets, which facilitates execution of legacy T32 code on newer processors. The content of this

and subsequent AArch32 chapters will focus exclusively on the A32 instruction set.

The AArch64 execution state is a modern computing environment that resembles the AArch32

execution state. It uses 64-bit wide registers and 64-bit memory addresses. It also includes a larger register

file than the AArch32 execution state. The AArch64 execution state supports the A64 instruction set, which

also employs fixed-length 32-bit wide instruction encodings. Compared to the A32 instruction set, the A64

instruction set uses different register operands and some different assembly language mnemonics. This

means that assembly language source code written for the AArch64 execution state is not compatible with

the AArch32 execution state and vice versa.

As mentioned earlier, Armv8-A-compliant processors are generally required to implement floating-

point and SIMD capabilities in hardware. This means that both AArch32 and AArch64 include floating-

point and SIMD register files. It also means that the A32 and A64 instruction sets incorporate instructions

for performing scalar floating-point arithmetic and vector (or packed) SIMD operations. Many Armv8-A

software development tools and application programming interfaces (APIs) also expect these hardware

floating-point and SIMD resources to be available. Arm’s SIMD technology is commonly called NEON.

Before proceeding, a couple of words about terminology are warranted. In all ensuing discussions,

I will use the terms Armv8, AArch32, AArch64, A32, and A64 as defined in the preceding paragraphs to

explain identifiable capabilities of the Armv8-A architecture profile. If you are interested in writing assembly

language code for other Armv8 profiles such as Armv8-M (microcontroller optimized) or Armv8-R (real-time

enhanced), the content of this book will help you achieve that goal. However, you should also consult the

documentation resources listed in Appendix B for important programming information about these profiles.

I will also use the terms Armv8-32 and Armv8-64 as umbrella expressions for A32/AArch32 and A64/

AArch64 when explaining or referencing general characteristics of Arm’s 32-bit and 64-bit technology.

The remainder of this chapter explains the core architecture of the AArch32 execution state. Chapter 10

discusses the core architecture of the AArch64 execution state.

Data Types

Programs written using the A32 instruction set can use a wide variety of data types. Most program data types

originate from a small set of fundamental data types that are intrinsic to the AArch32 execution state. These

data types enable the processor to perform numerical and logical operations using signed and unsigned

integers; half-precision (16-bit), single-precision (32-bit), and double-precision (64-bit) floating-point

numbers; and SIMD values. In this section, you will learn about these data types.

Fundamental Data Types

A fundamental data type is an elementary unit of data that is manipulated by the processor during program

execution. The AArch32 and AArch64 execution states support fundamental data types ranging in size from

8 bits (1 byte) to 128 bits (16 bytes). Table1-1 shows these types along with typical use patterns.

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