Document Number ENG-85857
Revision B
Author Jane Smith
A printed version of this document is an uncontrolled copy.
Cisco Systems, Inc. Page 4 of 17
2 Alignment/Space
2.1 Tabs
All alignment related white space should be 4 position tab characters. All popular UNIX text
editors can be made to use four position tabs instead of eight position tabs. The following UNIX
command can be used to create an alias that will print Verilog using enscript.
alias printcode ‘/usr/5bin/pr -t -e4 \!$ | enscript -b\!$’
2.2 Text file width
Files must be restricted to 160 columns wide. These limits aid in creating readable printouts.
The template is set up for 120 character width.
2.3 White space around operators
White space between operators can make code more readable. The exact spacing to leave is
left as individual preference. One example to improve readability is shown below.
Incorrect Example:
if((my_signal1==1’b0)&&(my_bus[3:0]==4’d5)) begin
Correct Example:
if ((my_signal == 1’b0) && (my_bus[3:0] == 4’d5))
begin
2.4 Nested indentation levels
Indentation levels are to be used to show code nesting. Case structures should use multiple
indentation levels to line up action statements. Blank lines may be used as desired to improve
code readability.. The Verilog keyword begin should appear on a line by itself so it can line
up with its end statement. The begin/end block should always be used, even if there is only
one statement. This makes adding lines of code much easier with fewer errors.
Incorrect Example:
if ( this ) begin
for ( i == 0; i < 10; i = i + 1 ) begin
statement1;
statement2;
end
statement3;
statement4;
end
else
statement5;