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Modules List
i.MX 6SoloX Automotive and Infotainment Applications Processors, Rev. 0
Freescale Semiconductor, Inc. 17
RTC_XTALI/RTC_XTALO If the user wishes to configure RTC_XTALI and RTC_XTALO as an RTC oscillator, a 32.768 kHz
crystal, (≤100 kΩ ESR, 10 pF load) should be connected between RTC_XTALI and RTC_XTALO.
Keep in mind the capacitors implemented on either side of the crystal are about twice the crystal
load capacitor. To hit the exact oscillation frequency, the board capacitors need to be reduced to
account for board and chip parasitics. The integrated oscillation amplifier is self biasing, but
relatively weak. Care must be taken to limit parasitic leakage from RTC_XTALI and RTC_XTALO
to either power or ground (>100 MΩ). This will debias the amplifier and cause a reduction of startup
margin. Typically RTC_XTALI and RTC_XTALO should bias to approximately 0.5 V.
If it is desired to feed an external low frequency clock into RTC_XTALI the RTC_XTALO pin should
be left floating or driven with a complimentary signal. The logic level of this forcing clock should not
exceed VDD_SNVS_CAP level and the frequency should be <100 kHz under typical conditions.
In case when high accuracy real time clock are not required system may use internal low frequency
ring oscillator. It is recommended to connect RTC_XTALI to GND and keep RTC_XTALO floating.
XTALI/XTALO A 24.0 MHz crystal should be connected between XTALI and XTALO.
The crystal must be rated for a maximum drive level of 250 μW. An ESR (equivalent series
resistance) of typical 80 Ω is recommended. Freescale BSP (board support package) software
requires 24 MHz on XTALI/XTALO.
The crystal can be eliminated if an external 24 MHz oscillator is available in the system. In this
case, XTALI must be directly driven by the external oscillator and XTALO is floated.
If this clock is used as a reference for USB and PCIe, then there are strict frequency tolerance and
jitter requirements. See OSC24M chapter and relevant interface specifications chapters for details.
DRAM_VREF When using DDR_VREF with DDR I/O, the nominal reference voltage must be half of the
NVCC_DRAM supply. The user must tie DDR_VREF to a precision external resistor divider. Use a
1kΩ 0.5% resistor to GND and a 1 kΩ 0.5% resistor to NVCC_DRAM. Shunt the resistor from
DRAM_VREF to ground with a closely mounted 0.1 μF capacitor.
To reduce supply current, a pair of 1.5 kΩ 0.1% resistors can be used. Using resistors with
recommended tolerances ensures the ± 2% DDR_VREF tolerance (per the DDR3 specification) is
maintained when four DDR3 ICs plus the i.MX 6SoloX are drawing current on the resistor divider.
ZQPAD DRAM calibration resistor 240 Ω 1% used as reference during DRAM output buffer driver
calibration should be connected between this pad and GND.
NVCC_LVDS_2P5 The DDR pre-drivers share the NVCC_LVDS_2P5 ball with the LVDS interface. This ball can be
shorted to VDD_HIGH_CAP on the circuit board.
GPANAIO This signal is reserved for Freescale manufacturing use only. User must leave this connection
floating.
JTAG_nnnn The JTAG interface is summarized in Table 4. Use of external resistors is unnecessary. However,
if external resistors are used, the user must ensure that the on-chip pull-up/down configuration is
followed. For example, do not use an external pull down on an input that has on-chip pull-up.
JTAG_TDO is configured with a keeper circuit such that the floating condition is eliminated if an
external pull resistor is not present. An external pull resistor on JTAG_TDO is detrimental and
should be avoided.
JTAG_MOD is referenced as SJC_MOD in the i.MX 6SoloX Applications Processor Reference
Manual (IMX6SXRM). Both names refer to the same signal. JTAG_MOD must be externally
connected to GND for normal operation. Termination to GND through an external pull-down resistor
(such as 1 kΩ) is allowed. JTAG_MOD set to high configures the JTAG interface to mode compliant
with IEEE1149.1 standard. JTAG_MOD set to low configures the JTAG interface for common
software debug adding all the system TAPs to the chain.
NC These signals are No Connect (NC) and should be floated by the user.
Table 3. Special Signal Considerations (continued)
Signal Name Remarks