开放VPX系统规范详解

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"OPENVPX_VITA 65-2010.pdf 是一份关于开放式VPX系统规范的标准文档，由VITA（VME International Trade Association）发布，旨在为VPX市场提供灵活的系统架构解决方案。该规范基于VPX系列标准，定义了一系列标准化配置，包括模块机械设计、连接器、散热方案、通信协议、辅助功能和电源定义。" VPX，全称为“VMEbus eXtreme”，是一种高性能的模块化嵌入式计算平台标准，广泛应用于军事、航空航天、工业自动化等领域，其特点是高带宽、低延迟和强大的处理能力。VPX标准通过使用先进的背板技术，实现了高速信号传输和模块间的高效互连。 VITA 65-2010《OpenVPX系统规范》是这一领域的核心标准，它在VPX的基础上引入了开放系统架构的概念。规范详细描述了各种标准配置，如插槽配置（slots）、背板设计（backplanes）、模块（modules）以及标准开发机箱（Standard Development Chassis）。这些配置定义了系统组件如何相互配合，确保不同供应商的模块可以无缝集成，提高了系统的互操作性和可扩展性。规范中的“标准配置”（profiles）是一组预定义的系统布局，涵盖了不同应用场景的需求，如实时控制、数据处理、网络通信等。每个配置定义了模块类型、连接器接口、电源分配以及冷却方案，以满足不同性能需求和环境条件。此外，VITA 65-2010标准遵循美国国家标准协会(ANSI)的审批流程，确保了标准的公正性和一致性。通过ANSI的审批，意味着该标准经过了充分的公开讨论，达到了行业内主要利益相关者的共识。 VPX和VITA 65-2010《OpenVPX系统规范》为嵌入式计算提供了开放且标准化的框架，促进了技术的创新和应用的多样性，使得系统设计师能够快速构建和部署符合高性能要求的复杂嵌入式系统。

ANSI/VITA 65-2010 Page 16 of 428 June 2010

Table 14.2.10-2 Payload Slot Profile SLT3-PAY-1F1U-14.2.10 — P2 & J2 ............................ 302

Table 14.3.1-1 Peripheral Slot Profile SLT3-PER-2F-14.3.1 — P1 & J1 .................................. 304

Table 14.3.1-2 Peripheral Slot Profile SLT3-PER-2F-14.3.1 — P2 & J2 .................................. 304

Table 14.3.2-1 Peripheral Slot Profile SLT3-PER-1F-14.3.2 — P1 & J1 .................................. 306

Table 14.3.2-2 Payload Slot Profile SLT3-PAY-1F-14.3.2 — P2 & J2 ..................................... 306

Table 14.3.3-1 Payload Slot Profile SLT3-PER-1U-14.3.3 — P1 & J1 ..................................... 308

Table 14.3.3-2 Payload Slot Profile SLT3-PAY-1U-14.3.3 — P2 & J2 .................................... 308

Table 14.4.1-1 Switch Slot Profile SLT3-SWH-6F6U-14.4.1 — P1 & J1 ................................. 311

Table 14.4.1-2 Switch Slot Profile SLT3-SWH-6F6U-14.4.1 — P2 & J2 ................................. 312

Table 14.4.1-3 User Defined Pins for Thin Pipe — P2 & J2...................................................... 312

Table 14.4.2-1 Switch Slot Profile SLT3-SWH-8F14.4.2 — P1 & J1 ....................................... 315

Table 14.4.2-2 Payload Slot Profile SLT3-SWH-8F-14.4.2 — P2 & J2 .................................... 315

Table 14.4.3-1 Switch Slot Profile SLT3-SWH-2F24U-14.4.3 — P1 & J1 ............................... 318

Table 14.4.3-2 Switch Slot Profile SLT3-SWH-2F24U-14.4.3 — P2 & J2 ............................... 319

Table 14.4.4-1 Switch Profile SLT3-SWH-4F-14.4.4 — P1 & J1 ............................................. 321

Table 14.4.4-2 Switch Profile SLT3-SWH-4F-14.4.4 — P2 & J2 ............................................. 321

Table 14.4.5-1 Switch Slot Profile SLT3-SWH-2F8U-14.4.5 — P1 & J1 ................................. 324

Table 14.4.5-2 Switch Profile SLT3-SWH-2F8U-14.4.5 — P2 & J2 ........................................ 324

Table 14.4.6-1 Switch Slot Profile SLT3-SWH-16T-14.4.6 — P1& J1 .................................... 327

Table 14.4.6-2 Switch Slot Profile SLT3-SWH-16T-14.4.6 — P2 & J2 ................................... 327

Table 14.4.7-1 Switch Slot Profile SLT3-SWH-1F14T-14.4.7 — P1& J1 ................................ 330

Table 14.4.7-2 Switch Slot Profile SLT3-SWH-1F14T-14.4.7 — P2 & J2 ............................... 330

Table 14.4.8-1 Switch Slot Profile SLT3-SWH-2F12T — J1 & P2 ......................................... 333

Table 14.4.8-2 Switch Slot Profile SLT3-SWH-2F12T-14.4.8 — P2& J2 ................................ 333

Table 14.5.1-1 Storage Slot Profile SLT3-STO-2U-14.5.1 — P1 & J1 ..................................... 336

Table 14.5.1-2 Storage Slot Profile SLT3- SLT3-STO-2U-14.5.1 — P2 & J2 .......................... 336

Table 15.2-1 OpenVPX 3U Backplane Profile Summary .......................................................... 338

Table 15.2-2 Matching 3U Module Profiles to Backplane Profiles ............................................ 340

Table 15.2.2-1 Backplane Profiles BKP3-CEN06-15.2.2-n ....................................................... 345

Table 15.2.2-2 BKP3-CEN06-15.2.2-n Control Plane Port connections ................................... 347

Table 15.2.2-3 BKP3-CEN06-15.2.2-n Data Plane Port connections ........................................ 348

Table 15.2.3-1 Backplane Profiles BKP3-CEN07-15.2.3-n ....................................................... 351

Table 15.2.3-2 BKP3-CEN07-15.2.3-n Control Plane Port connections ................................... 352

Table 15.2.3-3 BKP3-CEN07-15.2.3-n Data Plane Port connections ........................................ 353

Table 15.2.4-1 Backplane Profiles BKP3-CEN10-15.2.4-n ....................................................... 355

Table 15.2.4-2 BKP3-CEN10-15.2.4-n Data Plane Port connections ........................................ 357

Table 15.2.5-1 Backplane Profiles BKP3-CEN10-15.2.5-n ....................................................... 360

Table 15.2.5-2 BKP3-CEN10-15.2.5-n Data Plane Port connections ........................................ 362

Table 15.2.6-1 Backplane Profiles BKP3-CEN12-15.2.6-n ....................................................... 366

Table 15.2.6-2 BKP3-CEN12-15.2.6-n Control Plane Port connections ................................... 368

Table 15.2.6-3 BKP3-CEN12-15.2.6-n Data Plane Port connections ........................................ 369

ANSI/VITA 65-2010 Page 17 of 428 June 2010

Table 15.2.7-1 Backplane Profiles BKP3-DIS06-15.2.7-n ......................................................... 371

Table 15.2.7-2 Data Plane Connection BKP3-DIS06-15.2.7-n .................................................. 372

Table 15.2.8-1 Backplane Profiles BKP3-DIS02-15.2.8-n ......................................................... 375

Table 15.2.9-1 Backplane Profiles BKP3-CEN03-15.2.9-n ....................................................... 378

Table 15.2.10-1 Backplane Profiles BKP3-CEN06-15.2.10-n ................................................... 381

Table 15.2.11-1 Backplane Profiles BKP3-CEN09-15.2.11-n ................................................... 384

Table 15.2.12-1 Backplane Profiles BKP3-CEN06-15.2.12-n ................................................... 387

Table 15.2.13-1 Backplane Profiles BKP3-DIS05-15.2.13-n ..................................................... 390

Table 15.2.14-1 Backplane Profiles BKP3-DIS06-15.2.14-n ..................................................... 393

Table 15.2.14-2 Data Plane Connection BKP3-DIS06-15.2.14-n .............................................. 394

Table 16.2.1-1 Module Profiles MOD3-PAY-2F1F2U-16.2.1-n ............................................... 397

Table 16.2.2-1 Module Profiles MOD3-PAY-1F2F2U-16.2.2-n ............................................... 399

Table 16.2.3-1 Module Profiles MOD3-PAY-2F2U-16.2.3-n ................................................... 401

Table 16.2.4-1 Module Profiles MOD3-PAY-1F1F2U-16.2.4-n ............................................... 403

Table 16.2.5-1 Module Profiles MOD3-PAY-2F2T-16.2.5-n .................................................... 404

Table 16.2.6-1 Module Profiles MOD3-PAY-1D-16.2.6-n ........................................................ 405

Table 16.2.7-1 Module Profiles MOD3-PAY-2F-16.2.7-n ........................................................ 406

Table 16.2.8-1 Module Profiles MOD3-PAY-1F4U-16.2.8-n ................................................... 407

Table 16.2.9-1 Module Profiles MOD3-PAY-8U-16.2.9-n ........................................................ 408

Table 16.3.1-1 Module Profiles MOD3-PER-2F-16.3.1-n ......................................................... 409

Table 16.3.2-1 Module Profiles MOD3-PER-1F-16.3.2-n ......................................................... 410

Table 16.3.3-1 Module Profiles MOD3-PER-1U-16.3.3-n ........................................................ 411

Table 16.4.1-1 Module Profiles MOD3-SWH-6F6U-16.4.1-n ................................................... 413

Table 16.4.2-1 Module Profiles MOD3-SWH-8F-16.4.2-n ....................................................... 414

Table 16.4.3-1 Module Profiles MOD3-SWH-2F24U-16.4.3-n ................................................. 415

Table 16.4.4-1 Module Profiles MOD3-SWH-1F4U-16.4.4-n ................................................... 416

Table 16.4.5-1 Module Profiles MOD3-SWH-4F-16.4.5-n ....................................................... 417

Table 16.4.6-1 Module Profiles MOD3-SWH-2F8U-16.4.6-n ................................................... 419

Table 16.4.7-1 Module Profiles MOD3-SWH-16T-16.4.7-n ..................................................... 420

Table 16.4.8-1 Module Profiles MOD3-SWH-1F14T-16.4.8-n ................................................. 421

Table 16.4.9-1 Module Profiles MOD3-SWH-2F12T-16.4.9-n ................................................. 422

Table 16.5.1-1 Module Profiles MOD3-STO-2U-16.5.1-n ........................................................ 423

Table 17.2-1 3U Standard Development Chassis Backplane Power Options .......................... 426

ANSI/VITA 65-2010 Page 18 of 428 June 2010

Foreword (Pre VITA 65 OpenVPX TWG)

One of the best things about being the chairperson of the OpenVPX Technical Working Group

(TWG) is the honor of writing the foreword and being able to tell the story of working with a

fantastic group of individuals and the challenges we overcame.

The OpenVPX initiative philosophy was to consolidate the number of VPX variants to prevent

fracturing the VPX market. To put the importance of accomplishing this in perspective, over

thirty companies signed on to the OpenVPX initiative and well over two-thirds actively

participated in making the OpenVPX System Specification a reality.

The OpenVPX initiative was a brave new world for most of us. Generally, when we talk about a

system specification we are talking about a single system with limited applications. The

OpenVPX System Specification was to be a standard for a multitude of applications that are as

diverse as the embedded / rugged industry itself. So the first challenge was to understand the

embedded / rugged market diversity.

The second challenge was to agree on what backplane topologies, slot and module pin outs

should be included, and how they should be organized. We had no examples to follow, no

precedence set before us. The only system standard before us was the Advanced

Telecommunications Architecture™ (ATCA) or [PICMG 3.0] and it dealt with only one type of

application.

To understand why these challenges were so daunting, one must understand the basic VPX

standard. VPX defines a module with multi-plane, multi-fabric, multi-connector type, multi-

thermal, and multi-size options. The number of possible variants of a VPX module were

multiplying geometrically, working against any possibility of interoperability, and requiring a

custom implementation for every system employing VPX modules. To their credit, the

companies who joined this effort, and generally the industry as a whole, recognized the problem

and took action. The result is what follows - A VPX system standard defining an interoperable

core set of backplane/slot, module, and Chassis Profiles whose uses are only limited by the

imagination.

Robert (Bob) Ford

The Boeing Company

Chairperson, OpenVPX Technical Working Group

15 Oct 2009

ANSI/VITA 65-2010 Page 19 of 428 June 2010

Acknowledgements (Pre VITA 65 OpenVPX TWG)

The OpenVPX Technical Working Group gratefully acknowledges the following contributions to

the development of the OpenVPX specification:

• All of the work by the individuals, as noted in the Working Group Member list. This

represents thousands of hours of investment by them and their respective employers, and

for some their own time. These companies and individuals put aside their competitive

natures (temporarily) to create a cohesive team that accomplished a great amount of work

in a very short time.

• Two VITA working groups on which many OpenVPX backplane topologies, Module

Profiles, and Slot Profiles are based:

o VITA 46.20, chaired by Nauman Arshad of Curtiss-Wright Controls Embedded

Computing

o VITA 46.21, chaired by Scott Goedeke of Northrop Grumman Corporation

• To John Rynearson and the VME Standards Organization (VSO) for hosting the OpenVPX

website and helping make the transition of the document to VITA a smooth one.

• To Ian Dunn of Mercury Computing and the members of the OpenVPX Steering

Committee for establishing the Technical Working Group charter, providing clear

achievable goals, guidance, and keeping us all focused on the goal.

• To Mark Littlefield of Curtiss-Wright Controls Embedded Computing, chairperson of the

VITA 65 working group and OpenVPX co-Chairperson, who worked with me, at so many

levels, to make the document transition to VITA 65.

• To Bob Grochmal of Mercury Computing, for coordinating the TWG Face to Face

working sessions and providing planning and execution support to the TWG during the

specification development process.

• To the OpenVPX TWG sub-team leaders and co-leaders, who tackled contentious and

difficult issues, and whose patience knows no bounds – in alphabetical order:

o Nauman Arshad of Curtiss-Wright Controls Embedded Computing

o Chris Eckert of General Electric

o Jeff Porter of Extreme Engineering Solutions

o Greg Rocco of Mercury Computer Systems

o Bob Sullivan of Hybricon Corporation

o Dan Toohey of Mercury Computer Systems

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开放VPX系统规范详解

openvpx_VITA 65-2010标准协议.pdf

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ANSI_VITA_46.0-2007_American_National_Standard_for_VPX_Baseline_Standard

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VPX 46-48-65.rar

VITA 65 (OpenVPX) 规范齐套资料

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