TI TLIN1021A-Q1: A Fault-Tolerant LIN Transceiver with Advanced Automotive Features

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TI-TLIN1021A-Q1是一款专为汽车应用设计的高性能故障保护LIN收发器，它遵循了严格的AEC-Q100（1级）汽车电子可靠性标准以及LIN2.0至2.2A和ISO 17987-4电气物理层规范，确保了在严苛环境下的可靠性和安全性。作为SAEJ2602-1标准的遵循者，它支持功能安全系统设计，提供了丰富的文档资料。该收发器具有广泛的输入电压范围，从4.5V到36V，适应多种汽车电气系统需求。它支持高速数据传输，发送速率可达20kbps，接收速率则高达100kbps，能满足现代汽车网络中的信息传输需求。工作模式包括正常、待机和睡眠，通过源识别功能实现低功耗唤醒，支持通过LIN总线、WAKE引脚和EN引脚的远程或本地唤醒，有助于节省能源。 TLIN1021A-Q1集成有45kΩ LIN上拉电阻器，可以有效管理线路的电气特性。通过INH引脚，用户可以精细控制设备的电源消耗，确保系统级功耗管理。此外，它还具备上电/断电无干扰运行的能力，确保信号传输的稳定性。保护特性方面，该收发器能够承受±45V LIN总线的容错能力，支持42V负载突降和欠压保护，以及TXD显性状态超时检测，防止因温度过高而触发热关断。更重要的是，它能保护系统免受未供电节点或接地断开等故障的影响。这款产品适用于广泛的汽车应用，如车身电子装置、照明系统，汽车信息娱乐系统与仪表组，特别是混合动力电动汽车和动力总成系统的通信需求。工业运输领域也可能受益于其低功耗和高可靠性。 TLIN1021A-Q1采用了8引脚SOIC、VSON和SOT23封装，提供了不同尺寸和灵活性的选择，适应各种电路板布局。这款收发器凭借其卓越的性能、广泛的应用兼容性和完善的保护机制，是现代汽车电子系统中不可或缺的组件。

7.7 Electrical Characteristics (continued)

parameters valid across -40℃ ≤ T

≤ 150℃ (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

leak gnd(dom)

Leakage current, loss of ground

(5)

SUP

= 8 V, GND = open, V

SUP

= 18 V,

GND = open

Commander

= 1 kΩ, C

= 1 nF

Responder

= 20 kΩ, C

= 1 nF

LIN = dominant

–1

1 mA

leak gnd(rec)

Leakage current, loss of ground

(5)

SUP

= 8 V, GND = open, V

SUP

= 18 V,

GND = open

Commander

= 1 kΩ, C

= 1 nF

Responder

= 20 kΩ, C

= 1 nF

LIN = recessive

–100

100 µA

BUS_NO_BAT

Leakage current, loss of supply

SUP

= GND

0 V ≤ V

LIN

≤ 18 V

5 µA

RSLEEP

Pull-up current source to V

SUP

sleep mode V

SUP

= 14 V, LIN = GND

–20 –1.5

µA

Internal pull-up resistor to V

SUP

Normal and standby modes 20 45 60

kΩ

LIN

Capacitance of the LIN pin V

SUP

= 14 V 25 pF

INH Output Terminal

ΔV

High level voltage drop INH with respect to

SUP

INH

= - 0.5 mA 0.5 1 V

LKG(INH)

Leakage current sleep mode INH = 0 V

–0.5

0.5 µA

WAKE Input Terminal

High-level input voltage Standby and sleep mode

SUP

–

1.8

Low-level input voltage Standby and sleep mode

SUP

–

3.85

High-level input leakage current WAKE = V

SUP

- 1 V

–25 –12.5

µA

Ligh-level input leakage current WAKE = 1 V 15 25 µA

WAKE

WAKE hold time Wake up time from sleep mode 5 50 µs

Duty Cycle Characteristics

Duty cycle 1

(3)

ISO 17987 Param 27

REC(MAX)

= 0.744 x V

SUP

DOM(MAX)

= 0.581 x V

SUP

= 7 V to 18 V, t

BIT

= 50 µs

D1 = t

BUS_rec(min)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.396

D1 Duty cycle 1

(3)

(6)

REC(MAX)

= 0.665 x V

SUP

DOM(MAX)

= 0.499 x V

SUP

= 4.5 V to 7 V, t

BIT

= 50 µs

D1 = t

BUS_rec(min)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.396

Duty cycle 1

(1)

(2)

(6)

REC(MAX)

= 0.744 x V

SUP

DOM(MAX)

= 0.581 x V

SUP

= 7 V to 18 V, t

BIT

= 52 µs

D1 = t

BUS_rec(min)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.396

Duty cycle 2

(3)

ISO 17987 Param 28

REC(MIN)

= 0.422 x V

SUP

DOM(MIN)

= 0.284 x V

SUP

= 7 V to 18 V, t

BIT

= 50 µs

D2 = t

BUS_rec(MAX)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.581

D2 Duty cycle 2

(3)

(6)

REC(MIN)

= 0.496 x V

SUP

DOM(MIN)

= 0.361 x V

SUP

= 4.5 V to 7 V, t

BIT

= 50 µs

D2 = t

BUS_rec(MAX)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.581

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TLIN1021A-Q1

ZHCSMY5 – DECEMBER 2020

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Product Folder Links: TLIN1021A-Q1

7.7 Electrical Characteristics (continued)

parameters valid across -40℃ ≤ T

≤ 150℃ (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Duty cycle 2

(1)

(2)

(6)

REC(MIN)

= 0.422 x V

SUP

DOM(MIN)

= 0.284 x V

SUP

= 7 V to 18 V, t

BIT

= 52 µs

D2 = t

BUS_rec(MAX)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.581

Duty cycle 3

(3)

ISO 17987 Param 29

REC(MAX)

= 0.778 x V

SUP

DOM(MAX)

= 0.616 x V

SUP

= 7 V to 18 V, t

BIT

= 96 µs

D3 = t

BUS_rec(min)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.417

D3 Duty cycle 3

(3)

(6)

REC(MAX)

= 0.665 x V

SUP

DOM(MAX)

= 0.499 x V

SUP

= 4.5 V to 7 V, t

BIT

= 96 µs

D3 = t

BUS_rec(min)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.417

Duty cycle 3

(1)

(2)

(6)

REC(MAX)

= 0.778 x V

SUP

DOM(MAX)

= 0.616 x V

SUP

= 7 V to 18 V, t

BIT

= 96 µs

D3 = t

BUS_rec(min)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.417

Duty cycle 4

(3)

ISO 17987 Param 30

REC(MIN)

= 0.389 x V

SUP

DOM(MIN)

= 0.251 x V

SUP

= 7 V to 18 V, t

BIT

= 96 µs

D4 = t

BUS_rec(MAX)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.59

D4 Duty cycle 4

(3)

(6)

REC(MAX)

= 0.496 x V

SUP

DOM(MAX)

= 0.361 x V

SUP

= 4.5 V to 7 V, t

BIT

= 96 µs

D4 = t

BUS_rec(MAX)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.59

D4 Duty cycle 4

(1)

(2)

(6)

REC(MIN)

= 0.389 x V

SUP

DOM(MIN)

= 0.251 x V

SUP

= 7 V to 18 V, t

BIT

= 96 µs

D4 = t

BUS_rec(MAX)

/(2 x t

BIT

)

See 图 8-8 and 图 8-9

0.59

Duty cycle 1 at low battery

(1)

(2)

(6)

REC(MAX)

= 0.665 x V

SUP

DOM(MAX)

= 0.499 x V

SUP

= 5.5 V to 7 V, t

BIT

= 52 µs

0.396

Duty cycle 2 at low battery

(1)

(2)

(6)

REC(MAX)

= 0.496 x V

SUP

DOM(MAX)

= 0.361 x V

SUP

= 6.1 V to 7 V, t

BIT

= 52 µs

0.581

Duty cycle 3 at low battery

(1)

(2)

(6)

REC(MAX)

= 0.665 x V

SUP

DOM(MAX)

= 0.499 x V

SUP

= 5.5 V to 7 V, t

BIT

= 96 µs

0.396

4LB

Duty cycle 4 at low battery

(1)

(2)

(6)

REC(MAX)

= 0.496 x V

SUP

DOM(MAX)

= 0.361 x V

SUP

= 6.1 V to 7 V, t

BIT

= 96 µs

0.581

r-d max

Transmitter propagation delay timings for

the duty cycle

(1)

(2)

(6)

Recessive to dominant

REC(MAX)

= 0.744 x V

SUP

DOM(MAX)

= 0.581 x V

SUP

7 V ≤ V

SUP

≤ 18 V, t

BIT

= 52 µs

REC(MAX)_D1

- t

DOM(MIN)_D1

10.8 µs

d-r max

Transmitter propagation delay timings for

the duty cycle

(1)

(2)

(6)

Dominant to recessive

REC(MAX)

= 0.422 x V

SUP

DOM(MAX)

= 0.284 x V

SUP

7 V ≤ V

SUP

≤ 18 V, t

BIT

= 52 µs

DOM(MAX)_D2

- t

REC(MIN)_D2

8.4 µs

TLIN1021A-Q1

ZHCSMY5 – DECEMBER 2020

www.ti.com.cn

Submit Document Feedback

Product Folder Links: TLIN1021A-Q1

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