TI TPS25750：集成USB Type-C和PD控制器，适用于电源应用

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"TI-TPS25750是一款集成电源开关的USB Type-C和USB PD控制器，专为电源应用优化，适用于电源工具、移动电源等设备。它提供了独立的USB Type-C PD解决方案，无需外部微控制器或固件开发。该器件包括反向电流保护、过压和欠压保护、限流功能以及高压双向电源路径，确保了设备的安全。此外，它还支持BC1.2充电标准，符合USB PD3.0和USB Type-C规范。TPS25750拥有10个可配置GPIO，可以作为供电器件或耗电器件应用，并具有VCONN开关和3.3V LDO输出。通过网络GUI和预配置固件，简化了配置过程，加速产品上市。" TI公司的TPS25750是专为电源应用设计的一款高性能USB Type-C和USB Power Delivery (PD)控制器。它整合了一个5V、3A、36mΩ的电源开关（在TPS25750S/D版本中），以及一个28V、7A、16mΩ的双向负载开关（仅在TPS25750D版本中）。这使得它能有效地管理电源路径，同时提供保护措施，防止反向电流流动、过电压和过电流情况。这款控制器是一个独立的解决方案，无需额外的固件开发或外部微控制器。它内置的保护机制包括高压双向电源路径的反向电流保护、过压保护和压摆率控制，以及5V/3A拉电流电源路径的欠压、过压和浪涌电流保护。其CC引脚的26V耐压设计可以保护设备免受不兼容器件连接的影响。 TPS25750不仅适用于供电器件，也适用于耗电器件，特别优化了对电池充电器的集成控制，简化了与TI电池充电器的配合使用。它提供10个可配置的GPIO，支持BC1.2充电标准，符合最新的USB PD3.0和USB Type-C规范。该控制器还包括线缆连接和方向检测，以及集成的VCONN开关，确保USB Type-C接口的正常工作。为了方便用户，TPS25750配备了一个基于网络的图形用户界面（GUI），该界面通过问答方式简化了配置过程，帮助用户根据应用需求快速生成配置映像。这种直观的方法显著降低了与竞争对手的USB PD解决方案相关的复杂性。此外，TPS25750还包含一个3.3V LDO输出，用于在电池电量耗尽时提供支持，并可以选择3.3V或VBUS作为供电源。封装方面，TPS25750有QFN(RJK)和QFN(RSM)两种封装形式，尺寸分别为4.0mmx6.0mm和4.0mmx4.0mm。不同封装的选择满足了不同应用场景的尺寸需求。TPS25750是电源工具、移动电源、无线扬声器、耳机等个人电子和工业应用的理想选择，因为它提供了全面的功能、保护和易用性。

Operating under these conditions unless otherwise noted: 3.0 V ≤ V

VIN_3V3

≤ 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

RCP

Comparator mode RCP threshold,

PPHV

- V

VBUS

Setting 0, 4 V ≤ V

VBUS

≤

22 V, V

VIN_3V3

≤ 3.63 V

2 6 10 mV

setting 1, 4 V ≤ V

VBUS

≤

22 V, V

VIN_3V3

≤ 3.63 V

4 8 12 mV

Setting 2, 4 V ≤ V

VBUS

≤

22 V, V

VIN_3V3

≤ 3.63 V

6 10 14 mV

Setting 3, 4 V ≤ V

VBUS

≤

22 V, V

VIN_3V3

≤ 3.63 V

8 12 16 mV

Soft start slew rate for GATE_VSYS,

setting 0

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

0.35 0.41 0.47

V/ms

Soft start slew rate for GATE_VSYS,

setting 1

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

0.67 0.81 0.95

Soft start slew rate for GATE_VSYS,

setting 2

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

1.33 1.7 2.0

Soft start slew rate for GATE_VSYS,

setting 3

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

2.8 3.3 3.80

PPHV_OFF

Time allowed to disable the internal

PPHV switch in normal shutdown

mode

VBUS

= 20 V, V

PPHV

= 20 V

(initially), C

PPHV

< 1 nF,

PPHV

= 0.1 A, switch is off

when V

VBUS_IN

– V

PPHV

400 1000 µs

PPHV_OVP

Time allowed to disable the internal

PPHV switch in fast shutdown mode

OVP4RCP

exceeded), this includes

the response time of the comparator

OVP: V

OVP4RCP

= setting

57, V

VBUS

= 20 V initially,

then raised to 23 V in 50

ns, V

PPHV

VBUS_IN

(initially), C

PPHV

1 nF, I

PPHV

= 0.1 A, switch

is off when V

VBUS_IN

–

PPHV

> 0.1 V

2 4 µs

PPHV_RCP

Time allowed to disable the internal

PPHV switch in fast shutdown mode

RCP

exceeded), this includes the

response time of the comparator

RCP: V

RCP

= setting 0,

VBUS

= 5 V, V

VSYS

= 5 V

initially, then raised to 6 V

with dV/dt = 0.1 V/

µs, C

VBUS=

10 µF, measure

time from V

VSYS

> V

BUS

RCP

to the time of peak

voltage on VBUS

1 2 µs

PPHV_FSD

Time allowed to disable the internal

PPHV switch in fast shutdown mode

(OVP)

PPHV

= 20 V (initially),

VBUS

=20 V then raised to

23 V in 50 ns, r

OVP

= 1,

PPHV

< 1 nF, I

PPHV

= 0.1

A, switch is off when

VBUS_IN

– V

PPHV

> 0.5 V

0.25 20

μs

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TPS25750

ZHCSLS2A – JULY 2020 – REVISED NOVEMBER 2020

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Operating under these conditions unless otherwise noted: , 3.0 V ≤ V

VIN_3V3

≤ 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Soft start slew rate for GATE_VSYS,

setting 0

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

0.35 0.41 0.47

V/ms

Soft start slew rate for GATE_VSYS,

setting 1

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

0.67 0.81 0.91

Soft start slew rate for GATE_VSYS,

setting 2

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

1.33 1.7 1.80

Soft start slew rate for GATE_VSYS,

setting 3

4 V ≤ V

VBUS

≤ 22 V, I

LOAD

= 100 mA, 500 pF <

GATE_VSYS

< 16 nF,

measure slope from 10% to

90% of final VSYS value

2.8 3.3 3.80

GATE_VBUS_OFF

Time allowed to disable the external

FET via GATE_VBUS in normal

shutdown mode.

(1)

VBUS

= 20 V, Q

external FET = 40 nC or

GATE_VBUS

< 3 nF, gate is

off when V

GATE_VBUS

–

VBUS

< 1 V

450 4000 µs

GATE_VBUS_OVP

Time allowed to disable the external

FET via GATE_VBUS in fast

shutdown mode (V

OVP4RCP

exceeded), this includes the

response time of the comparator

(1)

OVP: V

OVP4RCP

= setting

57, V

VBUS

= 20 V initially,

then raised to 23 V in 50

ns, Q

of external FET = 40

nC or C

GATE_VBUS

< 3 nF,

gate is off when

GATE_VBUS

– V

VBUS

< 1 V

3 5 µs

GATE_VBUS_RCP

Time allowed to disable the external

FET via GATE_VBUS in fast

shutdown mode (V

RCP

exceeded),

this includes the response time of the

comparator

(1)

RCP: V

RCP

= setting 0,

VBUS

= 5 V, V

VSYS

= 5 V

initially, then raised to 5.5 V

in 50 ns, Q

of external

FET = 40 nC or C

GATE_VBUS

< 3 nF, gate is off when

GATE_VBUS

– V

VBUS

< 1 V

1 2 µs

GATE_VSYS_OFF

Time allowed to disable the external

FET via GATE_VSYS in normal

shutdown mode

(1)

VSYS

= 20 V, Q

external FET = 40 nC or

GATE_VBUS

< 3 nF, gate is

off when V

GATE_VSYS

–

VSYS

< 1 V

450 4000 µs

GATE_VSYS_FSD

Time allowed to disable the external

FET via GATE_VSYS in fast

shutdown mode (OVP)

(1)

VBUS

= 20 V initially, then

raised to 23 V in 50 ns, Q

of external FET = 40 nC or

GATE_VBUS

< 3 nF, gate is

off when V

GATE_VSYS

–

VSYS

< 1 V, r

OVP

= 1

0.25 20

μs

GATE_VBUS_ON

Time to enable GATE_VBUS

(1)

Measure time from when

= 0 V until V

>3 V,

where V

= V

GATE_VBUS

–

VBUS

0.25 2 ms

(1) These values depend upon the characteristics of the external N-ch MOSFET. The typical values were measured when

Px_GATE_VSYS and Px_GATE_VBUS were used to drive two CSD17571Q2 in common drain back-to-back configuration.

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TPS25750

ZHCSLS2A – JULY 2020 – REVISED NOVEMBER 2020

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7.11 Power Path Supervisory

Operating under these conditions unless otherwise noted: 3.0 V ≤ V

VIN_3V3

≤ 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

OVP4RCP

VBUS overvoltage protection for RCP

programmable range

OVP detected when V

VBUS

OVP4RCP

5.0 24 V

OVP4RCPH

Hysteresis 1.75 2 2.25 %

OVP

Ratio of OVP4RCP input used for

OVP4VSYS comparator. r

OVP

OVP4VSYS

= V

OVP4RCP

setting 0

1 V/V

setting 1 0.95 V/V

setting 2 0.90 V/V

setting 3 0.875 V/V

OVP4VSYS

VBUS overvoltage protection range for

VSYS protection

OVP detected when r

OVP

VBUS

> V

OVP4RCP

5 27.5 V

OVP4VSYS

Hysteresis

VBUS falling, % of

OVP4VSYS

, r

OVP

setting 0

1.75 2 2.25

VBUS falling, % of

OVP4VSYS

, r

OVP

setting 1

1.8 2.1 2.4

VBUS falling, % of

OVP4VSYS

, r

OVP

setting 2

1.9 2.2 2.5

VBUS falling, % of

OVP4VSYS

, r

OVP

setting 3

2 2.3 2.6

PP5V_UVLO

Voltage required on PP5V

rising 3.9 4.1 4.3

falling 3.8 4.0 4.2

hysteresis 0.1

DSCH

VBUS discharge current

VBUS

= 22 V, measure

VBUS

4 15 mA

7.12 CC Cable Detection Parameters

Operating under these conditions unless otherwise noted: 3.0 V ≤ V

VIN_3V3

≤ 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Type-C Source (Rp pullup)

OC_3.3

Unattached CCy open circuit

voltage while Rp enabled, no load

LDO_3V3

> 2.302 V, R

= 47 kΩ

1.85 V

OC_5

Attached CCy open circuit voltage

while Rp enabled, no load

PP5V

> 3.802 V, R

= 47 kΩ

2.95 V

Rev

Unattached reverse current on

CCy

= 5.5 V, V

CCx

= 0 V,

LDO_3V3_UVLO

< V

LDO_3V3

< 3.6 V,

PP5V

= 3.8 V, measure current

into CCy

µA

CCy

= 5.5 V, V

CCx

= 0 V,

LDO_3V3_UVLO

< V

LDO_3V3

< 3.6 V,

PP5V

= 0, T

≤ 85°C, measure

current into CCy

RpDef

Current source - USB Default 0 < V

CCy

< 1.0 V, measure I

CCy

64 80 96 µA

Rp1.5

Current source - 1.5 A

4.75 V < V

PP5V

< 5.5 V, 0 < V

CCy

1.5 V, measure I

CCy

166 180 194 µA

Rp3.0

Current source - 3.0 A

4.75 V < V

PP5V

< 5.5 V, 0 < V

CCy

2.45 V, measure I

CCy

304 330 356 µA

Type-C Sink (Rd pulldown)

SNK1

Open/Default detection threshold

when Rd applied to CCy

rising 0.2 0.24 V

SNK1

Open/Default detection threshold

when Rd applied to CCy

falling 0.16 0.20 V

Hysteresis 0.04 V

TPS25750

ZHCSLS2A – JULY 2020 – REVISED NOVEMBER 2020

www.ti.com.cn

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