TRF7964A：集成13.56MHz RFID读写器IC的全面规格与特性

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TRF7964A是一款多协议集成的13.56MHz RFID (Radio Frequency Identification) 读写器IC，专为电子标签读取和写入应用设计。该设备的关键特性包括： 1. **完全集成的协议处理**：支持ISO/IEC 15693、ISO/IEC 18000-3、ISO/IEC 14443 A 和 B 标准，以及FeliCa™技术，使得它能够在多种类型的RFID系统中实现高效通信。 2. **内置状态机支持ISO/IEC 14443A防碰撞操作（Broken Bytes）**：通过这种方式，能有效处理多个标签同时响应的情况，提高读取效率。 3. **宽广的输入电压范围**：工作在2.7VDC至5.5VDC之间，适应各种电源环境。 4. **可编程输出功率**：提供+20dBm（100mW）和+23dBm（200mW）两种模式，允许用户根据应用需求调整发射强度。 5. **可编程I/O电压水平**：从1.8VDC到5.5VDC，为系统内的其他组件如微控制器（MCU）、外围设备或指示灯提供灵活的接口选项。 6. **可编程系统时钟频率**：支持RF、RF/2和RF/4三种模式，可以从13.56MHz或27.12MHz频率选择，兼容不同应用场景下的频率要求。 7. **集成电压稳压器**：为系统中的其他电路提供稳定电源，最大电流可达20mA，确保系统稳定运行。 8. **可调制深度**：通过调整信号的幅度变化，优化接收信号的质量和抗干扰性能。 9. **双接收器架构**：采用这种设计可以增强接收信号的能力，提高读取灵敏度和可靠性。这款IC特别适合于对射频通信质量、安全性和灵活性有较高要求的项目，比如门禁系统、支付终端、物流追踪等。然而，文档末尾的重要通知中可能包含了关于产品可用性、保修政策、安全关键应用使用限制、知识产权声明以及其他重要免责声明，开发人员在使用前务必仔细阅读并理解这些内容。

TRF7964A

SLOS787I –MAY 2012–REVISED MARCH 2017

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Power Amplifier Supply: V

DD_PA

The power amplifier of the TRF7964A is supplied through V

DD_PA

(pin 4). The positive supply pin for the

RF power amplifier is externally connected to the regulator output V

DD_RF

(pin 3).

I/O Level Shifter Supply: V

DD_I/O

The TRF7964A has a separate supply input V

DD_I/O

(pin 16) for the built-in I/O level shifter. The supported

input voltage ranges from 1.8 V to V

, not exceeding 5.5 V. Pin 16 is used to supply the I/O interface pins

(I/O_0 to I/O_7), IRQ, SYS_CLK, and DATA_CLK pins of the reader. In typical applications, V

DD_I/O

directly connected to V

DD_X

, while V

DD_X

also supplies the MCU. This ensures that the I/O signal levels of

the MCU match the logic levels of the TRF7964A.

Negative Supply Connections: V

, V

SS_TX

, V

SS_RX

, V

SS_A

, V

SS_PA

The negative supply connections V

SS_X

of each functional block are all externally connected to GND.

The substrate connection is V

(pin 10), the analog negative supply is V

SS_A

(pin 15), the logic negative

supply is V

SS_D

(pin 29), the RF output stage negative supply is V

SS_PA

(pin 6), and the negative supply for

the RF receiver V

SS_RX

(pin 7).

TRF7964A

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SLOS787I –MAY 2012 –REVISED MARCH 2017

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(1) x = Don't care

6.3.2 Supply Regulator Settings

The input supply voltage mode of the reader needs to be selected. This is done in the Chip Status Control

configuration is 5 V, which reflects an operating supply voltage range of 4.3 V to 5.5 V. If the supply

voltage is below 4.3 V, the 3-V configuration should be used.

As V

DD_RF

is increased, the system can become more susceptible to noise coupling on the RX lines. For

minimum noise coupling, TI recommends using the value of 0x00. For improved range, higher V

DD_RF

voltages may be set, but complete system testing is required to determine the value which provides

optimal performance.

The various regulators can be configured to operate in automatic or manual mode. This is done in the

Regulator and I/O Control register (0x0B), as shown in Table 6-1 and Table 6-2.

Table 6-1. Supply Regulator Setting: 5-V System

ADDRESS

(hex)

OPTION BITS SETTING IN REGULATOR CONTROL REGISTER

(1)

COMMENTS

B7 B6 B5 B4 B3 B2 B1 B0

Automatic Mode (default)

0B 1 x x x x x 0 0 Automatic regulator setting 400-mV difference

Manual Mode

0B 0 x x x x 1 1 1 V

DD_RF

= 5 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 1 1 0 V

DD_RF

= 4.9 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 1 0 1 V

DD_RF

= 4.8 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 1 0 0 V

DD_RF

= 4.7 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 0 1 1 V

DD_RF

= 4.6 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 0 1 0 V

DD_RF

= 4.5 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 0 0 1 V

DD_RF

= 4.4 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 0 0 0 V

DD_RF

= 4.3 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

(1) x = Don't care

Table 6-2. Supply Regulator Setting: 3-V System

ADDRESS

(hex)

OPTION BITS SETTING IN REGULATOR CONTROL REGISTER

(1)

COMMENTS

B7 B6 B5 B4 B3 B2 B1 B0

Automatic Mode (default)

0B 1 x x x x x 0 0 Automatic regulator setting 400-mV difference

Manual Mode

0B 0 x x x x 1 1 1 V

DD_RF

= 3.4 V, V

DD_A

= 3.4 V, V

DD_X

= 3.4 V

0B 0 x x x x 1 1 0 V

DD_RF

= 3.3 V, V

DD_A

= 3.3 V, V

DD_X

= 3.3 V

0B 0 x x x x 1 0 1 V

DD_RF

= 3.2 V, V

DD_A

= 3.2 V, V

DD_X

= 3.2 V

0B 0 x x x x 1 0 0 V

DD_RF

= 3.1 V, V

DD_A

= 3.1 V, V

DD_X

= 3.1 V

0B 0 x x x x 0 1 1 V

DD_RF

= 3.0 V, V

DD_A

= 3.0 V, V

DD_X

= 3.0 V

0B 0 x x x x 0 1 0 V

DD_RF

= 2.9 V, V

DD_A

= 2.9 V, V

DD_X

= 2.9 V

0B 0 x x x x 0 0 1 V

DD_RF

= 2.8 V, V

DD_A

= 2.8 V, V

DD_X

= 2.8 V

0B 0 x x x x 0 0 0 V

DD_RF

= 2.7 V, V

DD_A

= 2.7 V, V

DD_X

= 2.7 V

The regulator configuration function adjusts the regulator outputs by default to 400 mV below V

level, but

not higher than 5 V for V

DD_RF

, 3.4 V for V

DD_A

and V

DD_X

. This ensures the highest possible supply

voltage for the RF output stage while maintaining an adequate PSRR (power supply rejection ratio).

TRF7964A

SLOS787I –MAY 2012–REVISED MARCH 2017

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(1) X = Don't care

6.3.3 Power Modes

The chip has several power states, which are controlled by two input pins (EN and EN2) and several bits

in the chip status control register (0x00) (see Table 6-3 and Table 6-4).

Table 6-3. 3.3-V Operation Power Modes

(1)

MODE EN2 EN

CHIP

STATUS

CONTROL

(0x00)

REGULATOR

CONTROL

(0x0B)

TRANSMITTER RECEIVER

SYS_CLK

(13.56 MHz)

SYS_CLK

(60 kHz)

DD_X

TYPICAL

CURRENT

(mA)

TYPICAL

POWER

OUT (dBm)

Power down 0 0 XX XX OFF OFF OFF OFF OFF <0.001 -

Sleep mode 1 0 XX XX OFF OFF OFF ON ON 0.120 -

Standby mode at +3.3 VDC X 1 80 00 OFF OFF ON X ON 2 -

Mode 1 at +3.3 VDC X 1 00 00 OFF OFF ON X ON 3 -

Mode 2 at +3.3 VDC X 1 02 00 OFF ON ON X ON 9 -

Mode 3 (half power) at

+3.3 VDC

X 1 30 07 ON ON ON X ON 53 14.5

Mode 4 (full power) at

+3.3 VDC

X 1 20 07 ON ON ON X ON 67 17

(1) X = Don't care

Table 6-4. 5-V Operation Power Modes

(1)

MODE EN2 EN

CHIP

STATUS

CONTROL

(0x00)

REGULATOR

CONTROL

(0x0B)

TRANSMITTER RECEIVER

SYS_CLK

(13.56 MHz)

SYS_CLK

(60 kHz)

DD_X

TYPICAL

CURRENT

(mA)

TYPICAL

POWER

OUT (dBm)

Power down 0 0 XX XX OFF OFF OFF OFF OFF <0.001 -

Sleep mode 1 0 XX XX OFF OFF OFF ON ON 0.120 -

Standby mode at +5 VDC X 1 81 07 OFF OFF ON X ON 3 -

Mode 1 at +5 VDC X 1 01 07 OFF OFF ON X ON 5 -

Mode 2 at +5 VDC X 1 03 07 OFF ON ON X ON 10.5 -

Mode 3 (half power) at

+5 VDC

X 1 31 07 ON ON ON X ON 70 20

Mode 4 (full power) at

+5 VDC

X 1 21 07 ON ON ON X ON 130 23

Table 6-3 and Table 6-4 show the configuration for the different power modes when using a 3.3-V or 5-V

system supply, respectively. The main reader enable signal is pin EN. When EN is set high, all of the

reader regulators are enabled, the 13.56-MHz oscillator is running and the SYS_CLK (output clock for

external microcontroller) is also available.

The input pin EN2 has two functions:

• A direct connection from EN2 to V

to ensure the availability of the regulated supply V

DD_X

and an

auxiliary clock signal (60 kHz, SYS_CLK) for an external MCU. This mode (EN = 0, EN2 = 1) is

intended for systems in which the MCU is also being supplied by the reader supply regulator (V

DD_X

)

and the MCU clock is supplied by the SYS_CLK output of the reader. This allows the MCU supply and

clock to be available during sleep mode.

• EN2 enables the start-up of the reader system from complete power down (EN = 0, EN2 = 0). In this

case the EN input is being controlled by the MCU (or other system device) that is without supply

voltage during complete power down (thus unable to control the EN input). A rising edge applied to the

EN2 input (which has an approximately 1-V threshold level) starts the reader supply system and 13.56-

MHz oscillator (identical to condition EN = 1).

When user MCU is controlling EN and EN2, a delay of 1 ms between EN and EN2 must be used. If the

MCU controls only EN, TI recommends connecting EN2 to either V

or GND, depending on the

application MCU requirements for V

DD_X

and SYS_CLK.

VIN

EN2

5 ms

6 ms

VIN

EN2

2 ms

5 ms

6 ms

TRF7964A

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SLOS787I –MAY 2012 –REVISED MARCH 2017

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Figure 6-3. Nominal Start-up Sequence Using SPI With SS (MCU Controls EN2)

Figure 6-4. Nominal Start-up Sequence Using Parallel (MCU Controls EN2)

This start-up mode lasts until all of the regulators have settled and the 13.56-MHz oscillator has stabilized.

If the EN input is set high (EN = 1) by the MCU (or other system device), the reader stays active. If the EN

input is not set high (EN = 0) within 100 µs after the SYS_CLK output is switched from auxiliary clock (60

kHz) to high-frequency clock (derived from the crystal oscillator), the reader system returns to complete

Power-Down Mode 1. This option can be used to wake-up the reader system from complete Power Down

(PD Mode 1) by using a pushbutton switch or by sending a single pulse.

After the reader EN line is high, the other power modes are selected by control bits within the chip status

control register (0x00). The power mode options and states are listed in Table 6-3.

When EN is set high (or on rising edge of EN2 and then confirmed by EN = 1) the supply regulators are

activated and the 13.56-MHz oscillator is started. When the supplies are settled and the oscillator

frequency is stable, the SYS_CLK output is switched from the auxiliary frequency of 60 kHz to the 13.56-

MHz frequency derived from the crystal oscillator. At this point, the reader is ready to communicate and

perform the required tasks. When this occurs, osc_ok (B6) of the RSSI Level and Oscillator Status register

is set. The MCU can then program the Chip Status Control register 0x00 and select the operation mode

by programming the additional registers.

• Standby Mode (bit 7 = 1 of register 0x00), the reader is capable of recovering to full operation in

100 µs.

• Mode 1 (active mode with RF output disabled, bit 5 = 0 and bit 1 = 0 of register 0x00) is a low power

mode which allows the reader to recover to full operation within 25 µs.

• Mode 2 (active mode with only the RF receiver active, bit 1 = 1 of register 0x00) can be used to

measure the external RF field (as described in RSSI measurements paragraph) if reader-to-reader

anticollision is implemented.

• Modes 3 and 4 (active modes with the entire RF section active, bit 5 = 1 of register 0x00) are the

normal modes used for normal transmit and receive operations.

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