IA OIF-MLG-02.0
Multi-link Gearbox 2.0 Implementation Agreement
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5 Introduction
The MLG (Multi-link Gearbox) 2.0 implementation agreement defines an in-band coding
that allows independent 10GBASE-R and 40GBASE-R signals to transit 4x25G and
8x25G gearboxes implementing a 100GBASE-R PMA function (or an expanded 8x25G
lane variant). This enables a variety of applications to reuse 100GBASE-R technology
for the transport of individual 10G and 40G links.
5.1 Requirements
Two applications are defined:
The MLG 2.0 4x25G gearbox application maps 10GBASE-R and/or 40GBASE-R
signals over 20 MLG lanes, with five MLG lanes bit-multiplexed over each
physical 25G lane. Two groups of eight MLG lanes can each be configured to
carry four 10GBASE-R signals or a single 40GBASE-R signal, while the
remaining four MLG lanes can carry two 10GBASE-R signals. When both of the
8 MLG lane groups are configured to carry four 10GBASE-R signals, the MLG
2.0 4x25G gearbox is compatible with, and can be interconnected with, an MLG
1.0 gearbox.
The MLG 2.0 8x25G gearbox application maps 10GBASE-R and/or 40GBASE-R
signals over 40 MLG lanes, with five MLG lanes bit-multiplexed over each
physical 25G lane. Five groups of eight MLG lanes can each be configured to
carry four 10GBASE-R signals or a single 40GBASE-R signal. While a particular
device might be implemented so that it can be configured to provide two 4x25G
gearbox applications or a single 8x25G gearbox application, the two applications
cannot be interconnected.
The MLG 2.0 4x25G mux encodes from zero to ten 10GBASE-R signals compliant with
IEEE Std 802.3
TM
-2012 clauses 49 and 51, and from zero to two 40GBASE-R signals
compliant with IEEE Std 802.3-2012 clauses 82 and 83 into a format consistent with the
IEEE Std 802.3-2012 clause 83 PMA service interface (e.g., four physical lanes of
25.78125 Gb/s ±100ppm). The MLG 2.0 4x25G demux decodes the format produced by
the MLG 2.0 4x25G mux to produce from zero to ten 10GBASE-R signals and from zero
to two 40GBASE-R signals. When configured to carry only 10GBASE-R signals, the
MLG 2.0 4x25G mux can be interconnected with an MLG 1.0 demux, and an MLG 1.0
mux can be interconnected with an MLG 2.0 4x25G demux. Note – for applications
requiring only support of two 40GBASE-R signals over four physical lanes (without
10GBASE-R support), the approach described in Appendix B may also be considered.
The MLG 2.0 8x25G mux encodes from zero to twenty 10GBASE-R signals compliant
with IEEE Std 802.3-2012 clauses 49 and 51 and from zero to five 40GBASE-R signals
compliant with IEEE Std 802.3-2012 clauses 82 and 83 into a format consistent with an
expanded interface similar to a double-width 100GBASE-R PMA (as if it were comprised
of double the number of PCS lanes striped over double the number of physical lanes
within the same skew and skew variation limits). The MLG 2.0 8x25G demux decodes
the format produced by the MLG 2.0 8x25G mux to produce from zero to twenty
10GBASE-R signals and from zero to five 40GBASE-R signals.
The MLG 2.0 mux to MLG 2.0 demux link preserves the compliance to IEEE Std 802.3-
2012 clauses 49 and 51 of each 10GBASE-R signal and the compliance to IEEE Std
802.3-2012 clauses 82 and 83 of each 40GBASE-R signal. Note that the exact bit
sequence of a given 10GBASE-R signal or 40GBASE-R signal is not preserved across