IEEE 1588-2008：网络测量与控制系统的精密时钟同步协议

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IEEE Std 1588™-2008, 简称IEEE 1588，是专为网络化测量和控制系统设计的精确时钟同步协议标准。此标准修订自IEEE Std 1588-2002，旨在解决在网络环境下对时间同步的高精度需求，尤其对于那些依赖于时间同步的工业自动化、电力系统、通信网络以及科学研究等领域至关重要。该标准由IEEE Instrumentation and Measurement Society的Sensor Technology Technical Committee (TC-9) 主导，它提供了一种机制，使得网络中的设备能够通过网络进行准确的时间同步，这对于确保数据采集的准确性、实时控制系统的协调以及故障检测中的时间一致性具有重要意义。其核心是定义了一套完整的协议流程，包括主时钟（Grand Master, GM）的选择、时间戳的交换以及同步状态的维护。 IEEE 1588采用了两种同步模式：基本模式（BMC，Basic Master Clock）和透明时钟模式（TCM，Transparent Clock Mode），分别针对不同的应用场景和设备能力。在基本模式下，网络中的节点依赖于一个已知的高精度时钟源作为主时钟，而在透明模式下，较低精度的设备也能通过与更高精度的时钟同步来提升自身的时间精度。标准还规定了时间同步的精度要求，通常能达到微秒级甚至纳秒级，这对于需要实时处理和分析的系统来说，如电力调度、智能电网、自动驾驶等，是不可或缺的技术基础。此外，为了保证可靠性和安全性，IEEE 1588标准还包含错误检测、恢复和防攻击机制。 IEEE Std 1588 TM-2008的批准日期为2008年3月27日，意味着它是当前最新版本，可能包含对先前版本的改进和增强。然而，由于下载限制，使用此标准可能受到特定条款和条件的约束，例如仅限于Cornell University在2008年12月1日下载时的授权。 IEEE 1588标准是网络测量和控制系统中实现精密时钟同步的关键技术，它不仅定义了规范，还提供了实施和验证精确时间同步所需的方法和工具，对于保障现代工业自动化和通信系统中对时间一致性要求极高的应用具有深远影响。

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Table 105

⎯Translation of flagField from version 2 to version 1......................................................181

Table 106 ⎯Version 2 fields with no version 1 counterpart...............................................................182

Table 107

⎯Version 1 fields with no version 2 counterpart...............................................................183

Table 108

⎯Name correspondence.....................................................................................................183

Table 109 ⎯Mixed system restrictions...............................................................................................184

Table B.1⎯Relationships between timescales...........................................................................................199

Table C.1⎯Interpretation of Figure C.1 key values..................................................................................202

Table C.2⎯Interpretation of Figure C.2 key values..................................................................................203

Table C.3⎯Interpretation of Figure C.3 key values..................................................................................205

Table C.4⎯Interpretation of Figure C.4 key values..................................................................................207

Table C.5⎯Interpretation of Figure C.5 key values..................................................................................209

Table C.6—Interpretation of Figure C.6 key values..................................................................................210

Table C.7—Interpretation of Figure C.7 key values..................................................................................211

Table C.8—Interpretation of Figure C.8 key values..................................................................................213

Table C.9—Interpretation of Figure C.9 key values..................................................................................215

Table C.10—Interpretation of Figure C.10 key values...............................................................................217

Table C.11—Interpretation of Figure C.11 key values...............................................................................218

Table D.1⎯IPv4 multicast addresses.........................................................................................................219

Table D.2⎯transportSpecific field values.................................................................................................220

Table E.1⎯IPv6 multicast addresses.........................................................................................................222

Table F.1⎯Multicast MAC addresses.......................................................................................................223

Table F.2⎯Ethernet transport specific field...............................................................................................224

Table G.1⎯DeviceNet clockIdentity octets 0 through 7............................................................................226

Table G.2⎯DeviceNet headers for all PTP message packets....................................................................226

Table H.1⎯ControlNet clockIdentity octets 2 through 7...........................................................................228

Table I.1⎯Mapping of messages...............................................................................................................231

Table I.2⎯IEEE 802.3 DLPDU syntax.....................................................................................................232

Table I.3⎯Multicast MAC address............................................................................................................233

Table I.4⎯LT (Length/Type).....................................................................................................................234

Table I.6⎯Mapping of the parameter and attribute names........................................................................235

Table I.7⎯Translation of flagField from PTP version 2 to PROFINET....................................................236

Table K.1⎯flagField.SECURE flag..........................................................................................................242

Table K.2⎯AUTHENTICATION TLV....................................................................................................260

Table K.3⎯algorithmId values..................................................................................................................261

Table K.4⎯ICV and pad length.................................................................................................................261

Table K.5⎯AUTHENTICATION_CHALLENGE TLV..........................................................................262

Authorized licensed use limited to: Cornell University. Downloaded on December 1, 2008 at 11:29 from IEEE Xplore. Restrictions apply.

xvi

FIGURES

Figure 1

⎯Mealy state transition diagram..............................................................................................10

Figure 2 ⎯Model of an ordinary clock...................................................................................................19

Figure 3

⎯Model of a boundary clock....................................................................................................21

Figure 4 ⎯Model of an end-to-end transparent clock.............................................................................22

Figure 5 ⎯End-to-end residence time correction model.........................................................................23

Figure 6

⎯Combined ordinary and end-to-end transparent clock...........................................................25

Figure 7

⎯Model of a peer-to-peer transparent clock.............................................................................27

Figure 8 ⎯Peer-to-peer residence time and link delay correction model................................................28

Figure 9

⎯Combined ordinary and peer-to-peer transparent clock........................................................30

Figure 10 ⎯Simple master−slave clock hierarchy...............................................................................32

Figure 11 ⎯Pruned mesh topology......................................................................................................33

Figure 12

⎯Basic synchronization message exchange........................................................................34

Figure 13

⎯Link delay measurement...................................................................................................35

Figure 14 ⎯Timestamp generation model............................................................................................36

Figure 15

⎯Hierarchical topology.......................................................................................................37

Figure 16 ⎯Linear topology.................................................................................................................38

Figure 17 ⎯Multiply connected topology............................................................................................39

Figure 18

⎯Bridging disparate technologies........................................................................................40

Figure 19

⎯Definition of latency constants.........................................................................................45

Figure 20 ⎯Propagation asymmetry....................................................................................................47

Figure 21

⎯Port model........................................................................................................................48

Figure 22 ⎯Scaled log variance hysteresis..........................................................................................60

Figure 23 ⎯State machine for a full implementation...........................................................................78

Figure 24

⎯State machine for a slave-only implementation................................................................79

Figure 25

⎯STATE_DECISION_EVENT logic.................................................................................81

Figure 26 ⎯State decision algorithm...................................................................................................87

Figure 27

⎯Data set comparison algorithm, part 1..............................................................................89

Figure 28 ⎯Data set comparison algorithm, part 2..............................................................................90

Figure 29 ⎯Receipt of Announce message logic.................................................................................96

Figure 30

⎯Receipt of Sync message logic.........................................................................................98

Figure 31

⎯Receipt of Follow_Up message logic.............................................................................100

Figure 32

⎯Receipt of Delay_Req message logic.............................................................................101

Figure 33

⎯Receipt of Delay_Resp message logic............................................................................103

Figure 34 ⎯Delay request-response path length measurement..........................................................110

Authorized licensed use limited to: Cornell University. Downloaded on December 1, 2008 at 11:29 from IEEE Xplore. Restrictions apply.

xvii

Figure 35

⎯Peer delay link measurement..........................................................................................113

Figure 36 ⎯Permitted mixed system configuration...........................................................................183

Figure 37

⎯Profile print form............................................................................................................186

Figure C.1⎯Master, end-to-end, and slave one-step clocks; no asymmetry correction............................201

Figure C.2⎯Master, end-to-end, and slave one-step clocks; with asymmetry correction.........................202

Figure C.3⎯Master two-step and end-to-end transparent and slave one-step clocks; with asymmetry

correction....................................................................................................................................................204

Figure C.4⎯Master and end-to-end transparent, two-step, and one-step, slave clocks; with asymmetry

correction....................................................................................................................................................206

Figure C.5⎯One-step master, two-step end-to-end transparent, and one-step slave clocks; with asymmetry

correction....................................................................................................................................................208

Figure C.6—One-step peer responder, end-to-end transparent, and peer requestor clocks; with asymmetry

correction....................................................................................................................................................210

Figure C.7—One-step peer responder, two-step end-to-end transparent, and one-step peer requestor clocks;

with asymmetry correction.........................................................................................................................211

Figure C.8—Two-step peer responder, two-step end-to-end transparent, and one-step peer requestor clocks:

option 1; with asymmetry correction..........................................................................................................212

Figure C.9—Two-step peer responder, two-step end-to-end transparent, and one-step peer requestor clocks:

option 2; with asymmetry correction..........................................................................................................214

Figure C.10—Two-step peer responder, one-step end-to-end transparent, and one-step peer requestor

clocks: option 2; with asymmetry correction..............................................................................................216

Figure C.11—One-step peer master, two-step peer-to-peer transparent, and one-step peer slave clocks; time

computation................................................................................................................................................217

Figure G.1⎯ Event message timestamp point...........................................................................................225

Figure I.1⎯PROFINET region combined with domains...........................................................................231

Figure K.1⎯PTP secure message processing............................................................................................252

Figure K.2⎯Challenge processing.............................................................................................................254

Figure K.3⎯Secure transmit processing....................................................................................................256

Figure K.4⎯Secure event processing........................................................................................................258

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