数字调制解调器中的插值技术——第一部分：基础原理
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"本文深入探讨了数字调制解调器中的插值技术，主要集中在插值的基本原理和控制方法上，适合通信领域的读者学习。作者Floyd M. Gardner是IEEE的资深成员，他在文中结合已知理论与新研究成果，提供了一个关于插值主题的教学式解析。"
在数字通信系统中，调制解调器（Modem）扮演着关键角色，负责在模拟和数字信号之间转换。标题提到的"[1993 TC]Interpolation in Digital Modems—Part I: Fundamentals"是一篇关于数字调制解调器中插值技术的文章，主要关注在非同步采样情况下的时间调整。在数字调制解调器中，如果采样频率不与数据符号同步，就需要通过插值来实现时间对齐。
文章首先介绍了插值的基本方程，这是理解插值过程的基础。插值是一种信号处理技术，用于在原始采样点之间插入新的样本，以提高采样率并恢复原始连续信号的细节。它对于保持信号质量至关重要，尤其是在接收端的定时恢复过程中。
接着，作者提出了一种控制插值的方法。在数字接收机中，为了与输入数据信号的符号同步，通常需要进行定时控制。这可以通过反馈环路实现，该环路调整本地时钟的相位，或者采用前馈结构来提前估计信号的定时误差。
文中还详细讨论了适用于插值器的信号处理特性，这包括了滤波、频谱特性以及插值对信号失真和噪声的影响。这些特性对于设计高效且低失真的插值算法至关重要。
此外，文章不仅回顾了插值技术的已有知识，还引入了新的研究成果，提供了一个教学式的解释，使读者能够更好地理解和应用这些概念。尽管这里没有给出具体的新结果细节，但可以推测，这些新成果可能涉及到更先进的控制策略或优化的插值算法。
作为系列的一部分，文章的后续部分很可能会详细讨论插值的性能和实现方面，包括实际系统中的挑战和解决方案。
这篇论文对通信工程和信号处理领域的专业人员以及学生来说是一份宝贵的资源，它深入浅出地介绍了数字调制解调器中插值技术的基本原理和实践应用，有助于提升他们在这一关键领域的理论知识和技术能力。
IEEE
TRANSACTIONS
ON
COMMUNICATIONS,
VOL.
41,
NO.
3,
MARCH
1993
SIGNAL IN
-
501
DATA OUT
DIGITAL
.
PROCESSOR
ANALOG PROCESSOR
+
Interpolation in Digital
Modems-Part
I:
Fundamentals
Floyd
M.
Gardner,
Fellow,
IEEE
Abstrucf-
Timing adjustment in a digital modem must be
performed by interpolation if sampling is not synchronized to
the data symbols. This paper describes the fundamental equation
for interpolation, proposes a method for control, and outlines the
signal-processing characteristics appropriate to an interpolator.
The material combines a review
of
previously known topics,
presentation of new results, and a tutorial exposition of the
subject.
A
companion paper will treat performance and implementa-
tion.
I.
INTRODUCTION
SAMPLER
SIGNAL IN DATA OUT
DIGITAL PROCESSOR
ANALOG PROCESSOR
0.
ANALOG RECOYCRY
b.
HYBRID
RECOVERY SAMPLING
@--I
TIMING CONTROL
CLOCK
IMING
in a data receiver must be synchronized to
T
the symbols of the incoming data signal. In analog-
implemented modems, synchronization typically is performed
by a feedback loop that adjusts the phase of a local clock,
or
by a feedforward arrangement that regenerates a timing wave
from the incoming signal. The local clock or the timing wave
is used to sample
(or
strobe)
the filtered output of the modem,
once per symbol interval. Message data are recovered from
detection of the symbols.
Implementation of the modem by digital techniques (a topic
of intense present activity) introduces sampling
of
the signal.
SAMPLER
SIGNAL IN DATA OUT
TIMING CONTROL
w
Fig. 1. Timing
CLOCK
recovery methods.
DIGITAL PROCESSOR
ANALOG PROCESSOR
the strobes. Timing of the strobes is adjusted for optimum
C.
DIGITAL RECOVERY
SAMPLING
N
In some circumstances, the sampling can be synchronized
to the symbol rate of the incoming signal; see Fig. l(a)
and (b). Timing in a synchronously sampled modem can be
recovered in much the same ways that are familiar from analog
practice.
In other circumstances, the sampling cannot be synchronized
to the incoming signal. Examples include
1)
digital processing
of unsynchronized frequency-multiplexed signals, or
2)
non-
synchronized digital capture and subsequent postprocessing
of
a signal. For one reason
or
another, the sampling clock must
remain independent of the symbol timing. See Fig. l(c) for a
nonsynchronized-sampling
configuration.
How is receiver timing to be adjusted, by digital methods,
when it is not possible to alter the sampling clock? One answer
is
to
interpolate
among the nonsynchronized samples in such
manner as to produce the correct strobe values at the modem
output-the same strobe values that would occur if the original
sampling had been synchronized to the symbols.
Interpolation is a timing-adjustment operation on the signal,
not on a local clock
or
timing wave. In this respect, it
is radically different from timing adjustment in the better-
known analog modems. Of all the operations in a digitally
implemented modem, interpolation
is
perhaps the one with
the least resemblance to established analog methods.
Several issues arise as follows.
-What mathematical model of interpolation can be de-
-How is interpolation to be controlled?
-What characteristics are desirable in an interpolator for
-How is the interpolator to be implemented?
-What performance can be obtained? How large is the
vised?
modems?
Paper approved by the Editor
for
Synchronization and Optical Detection
of
the IEEE Communication Society. Manuscript received December 6,
1990; revised May 23, 1991. This work was supported under Contract
8022/88/NL/DG by the European Space Agency, Noordwijk, The Netherlands.
This paper was presented at the Second International Workshop on Digital
Signal Processing Techniques Applied to Space Communications (DSP’90),
Politecnico di Torino, Turin, Italy, September 24-25, 1990.
computing burden?
-What conceptual model
is
appropriate for interpolation?
[l].
The first three issues are addressed here in Part
I,
and the
last three in Part
11
[I].
Attention is concentrated On
high-
These
are
the
matters
treated
in
this
paper
and
its
‘Ompanion
me author is with Gardner Research Company, Palo Alto, CA 94301,
‘peed
methods,
defined by
a
hardware-imposed
constraint
that
IEEE Log Number 9208042.
no clock frequency can greatly exceed the signal sample rate.
027&0062/93$03.00
0
1993 IEEE
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