LPC1111/14: NXP Cortex-M0微控制器的经济型32位硬件概述

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LPC1111/12/13/14系列是恩智浦(NXP)针对8/16位微控制器应用设计的一款低成本的32位ARM Cortex-M0架构微控制器家族。这款芯片以其高性能、低功耗、简洁的指令集和内存寻址方式，以及相比现有8/16位架构更小的代码尺寸而备受青睐。其工作频率可高达50MHz，提供了丰富的外设接口，包括： 1. **存储器**：支持多达32KB的Flash存储（在LPC1114型号上），数据内存容量可达到8KB，满足不同项目对存储空间的需求。 2. **通信接口**： - 一个Fast-mode Plus I2C总线，便于与多种设备进行串行通信。 - 一个兼容RS-485/EIA-485的UART接口，支持全双工通信，广泛应用于工业控制和通信应用。 - 可能有两组SPI接口，带有SSP功能，增强了与多种外围设备的连接能力。 3. **定时计数器/计时器**：至少提供四个通用计数器/定时器，用于精确的时间测量和事件计数。 4. **模拟输入**：内置10位的ADC，可用于采集模拟信号并转换为数字信号，方便数据处理。 5. **输入/输出接口**：最多42个通用输入/输出（GPIO）引脚，可根据设计需求配置为各种功能，如GPIO、中断输入等。值得注意的是，LPC1111/12/13/14系列是由LPC1100系列（LPC111x/101/201/301）和LPC1100L系列（LPC111x/102/202/302）构成的，LPC1100L系列可能包含不同的电源管理特性。此外，该系列还具备以下特点和优势： - **处理器**：基于Cortex-M0内核，支持嵌套向量中断控制器（NVIC），确保高效的任务管理和中断响应。 - **调试功能**：集成Serial Wire Debug（SWD）接口，方便开发过程中的调试和代码下载。 - **系统时钟管理**：内置系统时钟，可以精确控制芯片内部操作的节奏。这些特性使得LPC1111/12/13/14系列非常适合于那些对性能、功耗、代码大小和易于集成有较高要求的应用场景，如物联网设备、消费电子、工业自动化等。设计师可以根据具体项目需求，选择合适的LPC111x型号来优化系统设计。

Product data sheet Rev. 4 — 10 February 2011 11 of 66

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

PIO1_5/RTS/

CT32B0_CAP0

[3]

no I/O I; PU PIO1_5 — General purpose digital input/output pin.

O-RTS

— Request To Send output for UART.

I-CT32B0_CAP0 — Capture input 0 for 32-bit timer 0.

PIO1_6/RXD/

CT32B0_MAT0

[3]

no I/O I; PU PIO1_6 — General purpose digital input/output pin.

I-RXD — Receiver input for UART.

O-CT32B0_MAT0 — Match output 0 for 32-bit timer 0.

PIO1_7/TXD/

CT32B0_MAT1

[3]

no I/O I; PU PIO1_7 — General purpose digital input/output pin.

O-TXD — Transmitter output for UART.

O-CT32B0_MAT1 — Match output 1 for 32-bit timer 0.

PIO1_8/

CT16B1_CAP0

[3]

no I/O I; PU PIO1_8 — General purpose digital input/output pin.

I-CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.

PIO1_9/

CT16B1_MAT0

[3]

no I/O I; PU PIO1_9 — General purpose digital input/output pin.

O-CT16B1_MAT0 — Match output 0 for 16-bit timer 1.

PIO1_10/AD6/

CT16B1_MAT1

[5]

no I/O I; PU PIO1_10 — General purpose digital input/output pin.

I-AD6 — A/D converter, input 6.

O-CT16B1_MAT1 — Match output 1 for 16-bit timer 1.

PIO1_11/AD7 42

[5]

no I/O I; PU PIO1_11 — General purpose digital input/output pin.

I-AD7 — A/D converter, input 7.

PIO2_0 to PIO2_11 I/O Port 2 — Port 2 is a 12-bit I/O port with individual direction and

function controls for each bit. The operation of port 2 pins

depends on the function selected through the IOCONFIG

PIO2_0/DTR

/SSEL1 2

[3]

no I/O I; PU PIO2_0 — General purpose digital input/output pin.

O-DTR

— Data Terminal Ready output for UART.

I/O - SSEL1 — Slave Select for SPI1.

PIO2_1/DSR

/SCK1 13

[3]

no I/O I; PU PIO2_1 — General purpose digital input/output pin.

I-DSR

— Data Set Ready input for UART.

I/O - SCK1 — Serial clock for SPI1.

PIO2_2/DCD

/MISO1 26

[3]

no I/O I; PU PIO2_2 — General purpose digital input/output pin.

I-DCD

— Data Carrier Detect input for UART.

I/O - MISO1 — Master In Slave Out for SPI1.

PIO2_3/RI

/MOSI1 38

[3]

no I/O I; PU PIO2_3 — General purpose digital input/output pin.

I-RI

— Ring Indicator input for UART.

I/O - MOSI1 — Master Out Slave In for SPI1.

PIO2_4 19

[3]

no I/O I; PU PIO2_4 — General purpose digital input/output pin.

PIO2_5 20

[3]

no I/O I; PU PIO2_5 — General purpose digital input/output pin.

PIO2_6 1

[3]

no I/O I; PU PIO2_6 — General purpose digital input/output pin.

PIO2_7 11

[3]

no I/O I; PU PIO2_7 — General purpose digital input/output pin.

PIO2_8 12

[3]

no I/O I; PU PIO2_8 — General purpose digital input/output pin.

PIO2_9 24

[3]

no I/O I; PU PIO2_9 — General purpose digital input/output pin.

Table 3. LPC1113/14 pin description table (LQFP48 package)

…continued

Symbol Pin Start

logic

input

Type Reset

state

[1]

Description

Product data sheet Rev. 4 — 10 February 2011 12 of 66

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled.

[2] See Figure 33

for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to

reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down

mode.

[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 32

[4] I

C-bus pads compliant with the I

C-bus specification for I

C standard mode and I

C Fast-mode Plus.

[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.

When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 32

[6] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded

(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.

PIO2_10 25

[3]

no I/O I; PU PIO2_10 — General purpose digital input/output pin.

PIO2_11/SCK0 31

[3]

no I/O I; PU PIO2_11 — General purpose digital input/output pin.

I/O - SCK0 — Serial clock for SPI0.

PIO3_0 to PIO3_5 I/O Port 3 — Port 3 is a 12-bit I/O port with individual direction and

function controls for each bit. The operation of port 3 pins

depends on the function selected through the IOCONFIG

PIO3_0/DTR

[3]

no I/O I; PU PIO3_0 — General purpose digital input/output pin.

O-DTR

— Data Terminal Ready output for UART.

PIO3_1/DSR

[3]

no I/O I; PU PIO3_1 — General purpose digital input/output pin.

I-DSR

— Data Set Ready input for UART.

PIO3_2/DCD

[3]

no I/O I; PU PIO3_2 — General purpose digital input/output pin.

I-DCD

— Data Carrier Detect input for UART.

PIO3_3/RI

[3]

no I/O I; PU PIO3_3 — General purpose digital input/output pin.

I-RI

— Ring Indicator input for UART.

PIO3_4 18

[3]

no I/O I; PU PIO3_4 — General purpose digital input/output pin.

PIO3_5 21

[3]

no I/O I; PU PIO3_5 — General purpose digital input/output pin.

8; 44 - I - 3.3 V supply voltage to the internal regulator, the external rail,

and the ADC. Also used as the ADC reference voltage.

XTALIN 6

[6]

- I - Input to the oscillator circuit and internal clock generator circuits.

Input voltage must not exceed 1.8 V.

XTALOUT 7

[6]

- O - Output from the oscillator amplifier.

5; 41 - I - Ground.

Table 3. LPC1113/14 pin description table (LQFP48 package)

…continued

Symbol Pin Start

logic

input

Type Reset

state

[1]

Description

Product data sheet Rev. 4 — 10 February 2011 13 of 66

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

Table 4. LPC1114 pin description table (PLCC44 package)

Symbol Pin Start

logic

input

Type Reset

state

[1]

Description

PIO0_0 to PIO0_11 I/O Port 0 — Port 0 is a 12-bit I/O port with individual direction and

function controls for each bit. The operation of port 0 pins depends

on the function selected through the IOCONFIG register block.

RESET

/PIO0_0 7

[2]

yes I I; PU RESET — External reset input with 20 ns glitch filter. A LOW-going

pulse as short as 50 ns on this pin resets the device, causing I/O

ports and peripherals to take on their default states and processor

execution to begin at address 0.

I/O - PIO0_0 — General purpose digital input/output pin with 10 ns glitch

filter.

PIO0_1/CLKOUT/

CT32B0_MAT2

[3]

yes I/O I; PU PIO0_1 — General purpose digital input/output pin. A LOW level on

this pin during reset starts the ISP command handler.

O- CLKOUT — Clockout pin.

O- CT32B0_MAT2 — Match output 2 for 32-bit timer 0.

PIO0_2/SSEL0/

CT16B0_CAP0

[3]

yes I/O I; PU PIO0_2 — General purpose digital input/output pin.

I/O - SSEL0 — Slave Select for SPI0.

I- CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.

PIO0_3 18

[3]

yes I/O I; PU PIO0_3 — General purpose digital input/output pin.

PIO0_4/SCL 19

[4]

yes I/O I; PU PIO0_4 — General purpose digital input/output pin (open-drain).

I/O - SCL — I

C-bus, open-drain clock input/output. High-current sink

only if I

C Fast-mode Plus is selected in the I/O configuration

PIO0_5/SDA 20

[4]

yes I/O I; PU PIO0_5 — General purpose digital input/output pin (open-drain).

I/O - SDA — I

C-bus, open-drain data input/output. High-current sink only

if I

C Fast-mode Plus is selected in the I/O configuration register.

PIO0_6/SCK0 26

[3]

yes I/O I; PU PIO0_6 — General purpose digital input/output pin.

I/O - SCK0 — Serial clock for SPI0.

PIO0_7/CTS

[3]

yes I/O I; PU PIO0_7 — General purpose digital input/output pin (high-current

output driver).

I- CTS

— Clear To Send input for UART.

PIO0_8/MISO0/

CT16B0_MAT0

[3]

yes I/O I; PU PIO0_8 — General purpose digital input/output pin.

I/O - MISO0 — Master In Slave Out for SPI0.

O- CT16B0_MAT0 — Match output 0 for 16-bit timer 0.

PIO0_9/MOSI0/

CT16B0_MAT1

[3]

yes I/O I; PU PIO0_9 — General purpose digital input/output pin.

I/O - MOSI0 — Master Out Slave In for SPI0.

O- CT16B0_MAT1 — Match output 1 for 16-bit timer 0.

SWCLK/PIO0_10/

SCK0/CT16B0_MAT2

[3]

yes I I; PU SWCLK — Serial wire clock.

I/O - PIO0_10 — General purpose digital input/output pin.

I/O - SCK0 — Serial clock for SPI0.

O- CT16B0_MAT2 — Match output 2 for 16-bit timer 0.

Product data sheet Rev. 4 — 10 February 2011 14 of 66

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

R/PIO0_11/

AD0/CT32B0_MAT3

[5]

yes - I; PU R — Reserved. Configure for an alternate function in the IOCONFIG

block.

I/O - PIO0_11 — General purpose digital input/output pin.

I- AD0 — A/D converter, input 0.

O- CT32B0_MAT3 — Match output 3 for 32-bit timer 0.

PIO1_0 to PIO1_11 Port 1 — Port 1 is a 12-bit I/O port with individual direction and

function controls for each bit. The operation of port 1 pins depends

on the function selected through the IOCONFIG register block.

R/PIO1_0/

AD1/CT32B1_CAP0

[5]

yes - I; PU R — Reserved. Configure for an alternate function in the IOCONFIG

block.

I/O - PIO1_0 — General purpose digital input/output pin.

I- AD1 — A/D converter, input 1.

I- CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.

R/PIO1_1/

AD2/CT32B1_MAT0

[5]

no - I; PU R — Reserved. Configure for an alternate function in the IOCONFIG

block.

I/O - PIO1_1 — General purpose digital input/output pin.

I- AD2 — A/D converter, input 2.

O- CT32B1_MAT0 — Match output 0 for 32-bit timer 1.

R/PIO1_2/

AD3/CT32B1_MAT1

[5]

no - I; PU R — Reserved. Configure for an alternate function in the IOCONFIG

block.

I/O - PIO1_2 — General purpose digital input/output pin.

I- AD3 — A/D converter, input 3.

O- CT32B1_MAT1 — Match output 1 for 32-bit timer 1.

SWDIO/PIO1_3/AD4/

CT32B1_MAT2

[5]

no I/O I; PU SWDIO — Serial wire debug input/output.

I/O - PIO1_3 — General purpose digital input/output pin.

I- AD4 — A/D converter, input 4.

O- CT32B1_MAT2 — Match output 2 for 32-bit timer 1.

PIO1_4/AD5/

CT32B1_MAT3/

WAKEUP

[5]

no I/O I; PU PIO1_4 — General purpose digital input/output pin with 10 ns glitch

filter.

I- AD5 — A/D converter, input 5.

O- CT32B1_MAT3 — Match output 3 for 32-bit timer 1.

I- WAKEUP — Deep power-down mode wake-up pin with 20 ns glitch

filter. This pin must be pulled HIGH externally to enter Deep

power-down mode and pulled LOW to exit Deep power-down mode.

A LOW-going pulse as short as 50 ns wakes up the part.

PIO1_5/RTS

CT32B0_CAP0

[3]

no I/O I; PU PIO1_5 — General purpose digital input/output pin.

O- RTS

— Request To Send output for UART.

I- CT32B0_CAP0 — Capture input 0 for 32-bit timer 0.

PIO1_6/RXD/

CT32B0_MAT0

[3]

no I/O I; PU PIO1_6 — General purpose digital input/output pin.

I- RXD — Receiver input for UART.

O- CT32B0_MAT0 — Match output 0 for 32-bit timer 0.

Table 4. LPC1114 pin description table (PLCC44 package)

…continued

Symbol Pin Start

logic

input

Type Reset

state

[1]

Description

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