AT93C46芯片详解：低功耗嵌入式开发必备
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AT93C46是一款专为嵌入式开发设计的低电压及标准电压操作的高性能芯片。这款电可擦除只读存储器（Electrically Erasable Programmable Read-Only Memory, EEPROM）具有以下关键特性：
1. **低功耗与宽工作电压范围**：
AT93C46支持1.8伏（VCC=1.8V至5.5V），这意味着它能够在低电压环境下运行，非常适合对功耗敏感的工业和商业应用。
2. **用户可选内部组织**：
内存容量灵活，可以根据ORG引脚的连接选择组织为1K个128x8位或64x16位的单元。通过改变引脚配置，用户可以适应不同大小的数据存储需求。
3. **三线串行接口**：
设备采用简洁的三线接口，包括Data In（数据输入）、Write Enable（写使能）和Chip Select（片选）信号，方便外围设备进行数据传输和操作控制。
4. **高时钟速率与自定时写周期**：
在5V供电下，最大写周期可达5毫秒，这有助于提高数据传输速度和系统响应效率。
5. **高可靠性**：
AT93C46具有极高的耐用性，能够承受100万次写操作循环，数据保持时间长达100年，确保长期稳定的数据存储。
6. **多种封装形式**：
提供了多种封装选项，包括8引脚JEDC DIP、8引脚JEDC SOIC、8引脚超薄迷你MAP (MLP2x3)、8引脚TSSOP和8引脚球栅阵列(DBGA2)包装，以满足不同的电路板布局和尺寸要求。
7. **生产形式多样**：
可以购买wafer形式、带卷盘和凸焊晶圆的芯片，以适应大规模生产和定制化应用。
在实际应用中，AT93C46因其灵活性、低功耗和可靠的特性，在工业控制、通信设备、消费电子以及其它需要非易失性数据存储且对功耗敏感的场景中发挥着重要作用。学习嵌入式开发的人员可以通过研究AT93C46的规格和使用方法，掌握如何有效利用这款芯片来设计和构建高效、小型化的系统。
5
5193F–SEEPR–1/08
AT93C46D
Note: The Xs in the address field represent DON’T CARE values and must be clocked.
2. Functional Description
The AT93C46D is accessed via a simple and versatile three-wire serial communication inter-
face. Device operation is controlled by seven instructions issued by the host processor. A valid
instruction starts with a rising edge of CS and consists of a start bit (logic “1”) followed by the
appropriate op code and the desired memory address location.
READ (READ): The Read (READ) instruction contains the address code for the memory loca-
tion to be read. After the instruction and address are decoded, data from the selected memory
location is available at the serial output pin DO. Output data changes are synchronized with the
rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or
16-bit data output string.
ERASE/WRITE ENABLE (EWEN): To assure data integrity, the part automatically goes into the
Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN)
instruction must be executed first before any programming instructions can be carried out.
Please note that once in the EWEN state, programming remains enabled until an EWDS instruc-
tion is executed or V
CC
power is removed from the part.
ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory
location to the logical “1” state. The self-timed erase cycle starts once the Erase instruction and
address are decoded. The DO pin outputs the Ready/Busy status of the part if CS is brought
high after being kept low for a minimum of 250 ns (t
CS
). A logic “1” at pin DO indicates that the
selected memory location has been erased and the part is ready for another instruction.
WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written
into the specified memory location. The self-timed programming cycle t
WP
starts after the last bit
of data is received at serial data input pin DI. The DO pin outputs the Read/Busy status of the
part if CS is brought high after being kept low for a minimum of 250 ns (t
CS
). A logic “0” at DO
indicates that programming is still in progress. A logic “1” indicates that the memory location at
the specified address has been written with the data pattern contained in the instruction and the
Table 1-4. Instruction Set for the AT93C46D
Instruction SB
Op
Code
Address Data
Commentsx 8 x 16 x 8 x 16
READ 1 10 A
6
– A
0
A
5
– A
0
Reads data stored in memory, at
specified address
EWEN 1 00 11XXXXX 11XXXX
Write enable must precede all
programming modes
ERASE 1 11 A
6
– A
0
A
5
– A
0
Erases memory location A
n
– A
0
WRITE 1 01 A
6
– A
0
A
5
– A
0
D
7
– D
0
D
15
– D
0
Writes memory location A
n
–
A
0
ERAL 1 00 10XXXXX 10XXXX
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
WRAL 1 00 01XXXXX 01XXXX D
7
– D
0
D
15
– D
0
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
EWDS 1 00 00XXXXX 00XXXX Disables all programming instructions
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