16 Synopsys, Inc.
SolvNet
DesignWare.com
2.50a
November 2012
Revision History SuperSpeed USB 3.0 Controller Databook
November 2012
Cont’d
2.50a
Cont’d
(Continued)
xHCI Registers
■
SUPTPRT2_DW2[20]: Added a new bit BLC to SUPTPRT2_DW2
■
Updated the access type of all Reserved fields from RO to Rsvd to be consistent
with the xHCI Specification
Chapter 8, “Device Programming Model”
■
Added more information on DEPCFG command in Table 8-5 on page 565 and
Table 8-6 on page 566
Chapter 9, “Host Programming Model”
■
Added the following new sections
- “Debug Support in Multi-Port and One-Port Configurations” on page 604
- “Disabled Endpoint Handling (DCCTRL.DRC/DCR)” on page 613
- “FIFO Sizes Impact” on page 625
■
Updated Table 9-3 on page 618
- Added HCRST behavior
- Updated Chained TRBs greater than TRB cache size
- Removed Multiple Ports since it is supported now
■
Updated “TRB Cache Size and Transfers” on page 624
Chapter 11, “OTG v2/v3 Add-Ons and Battery Charger”
■
Added a note on A-Peripheral to A-Host flow in “A-Host -> A-Peripheral -> A-Host
Flow” on page 678
Chapter 12, “Power Management”
■
Updated “Software-Initiated Hibernation While Connected” on page 730 and
“Device-Initiated Disconnect and Low Power While Disconnected” on page 731
■
Updated step 8 for DSTS.USBLnkSt values other than 3, 14, and 15 in “Software
or PHY-Initiated Resume While Connected” on page 732.
■
Updated width of the Core/PMU data bus to 32 bits (see Figure 12-7 on page 747
and Tabl e 1 2 - 6 on page 747)
Chapter 13, “Device Mode Non-Processor Interface (NPI)”
■
Updated description of npi_dev_config[31:0] in Table 13-5
Appendix C, “Fixed ECNs”
■
Added a new table on Fixed xHCI ECNs (Tabl e C -3 on page 925)
(Continued)
Date Version Description
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