Atmega8单片机快速入门与应用探索

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"Atmeg8单片机是一款高性能、低功耗的AVR系列8位微控制器，适合初学者学习使用。其主要特性包括先进的RISC架构、丰富的内存资源以及多种外围设备功能。" Atmel的ATmega8单片机是嵌入式系统设计中的常见选择，尤其对于初学者而言，它提供了理想的平台来学习微控制器的基础知识和实践经验。这款微控制器的核心是基于RISC（精简指令集计算）的先进架构，具有130条强大的指令，大多数指令可在单个时钟周期内执行，从而实现高效的处理速度。此外，ATmega8拥有32个8位通用工作寄存器，可以在运行时快速访问数据。在内存方面，ATmega8配备了8KB的在系统可自编程Flash程序存储器，用于存储用户程序。同时，它还包含了512B的EEPROM，可用于非易失性数据存储，如配置参数或日志记录。内部的1KByte SRAM用于临时存储运行时的数据。该芯片的Flash和EEPROM具有高耐久性，可承受10,000次写入/擦除循环（Flash）和100,000次（EEPROM），并能在特定温度下保证数据长达20年（85°C）至100年（25°C）的保留时间。此外，还有一个独立的锁定位选项，用于Boot Code Section，支持在系统编程和安全保护。在硬件外设上，ATmega8提供了一系列丰富的功能，包括两个8位定时器/计数器，带有独立的预分频器和比较模式；一个16位定时器/计数器，同样带有预分频器、比较模式和捕捉模式，适用于定时和脉冲处理。还有实时时钟计数器，独立的振荡器，以及三个PWM通道，可用于电机控制或信号调制。在模拟部分，ATmega8提供了8通道10位ADC（模数转换器）在TQFP和QFN/MLF封装中，而在PDIP封装中则为6通道，确保了数字和模拟世界的交互。最后，它还包含了一个字节定向的两线串行接口，如I²C，用于与其他设备进行通信。 ATmega8单片机因其高性能、低功耗特性和丰富的外设接口，成为了初学者和经验丰富的工程师们进行嵌入式系统开发的理想工具。通过理解和掌握这款单片机的工作原理和使用方法，开发者可以构建各种应用，从简单的控制任务到复杂的系统集成。

2486T–AVR–05/08

ATmega8(L)

When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-

cuted before any pending interrupts, as shown in the following example.

Interrupt Response

Time

The interrupt execution response for all the enabled AVR interrupts is four clock cycles mini-

mum. After four clock cycles, the Program Vector address for the actual interrupt handling

routine is executed. During this 4-clock cycle period, the Program Counter is pushed onto the

Stack. The Vector is normally a jump to the interrupt routine, and this jump takes three clock

cycles. If an interrupt occurs during execution of a multi-cycle instruction, this instruction is com-

pleted before the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the

interrupt execution response time is increased by four clock cycles. This increase comes in addi-

tion to the start-up time from the selected sleep mode.

A return from an interrupt handling routine takes four clock cycles. During these four clock

cycles, the Program Counter (2 bytes) is popped back from the Stack, the Stack Pointer is incre-

mented by 2, and the I-bit in SREG is set.

Assembly Code Example

sei ; set global interrupt enable

sleep; enter sleep, waiting for interrupt

; note: will enter sleep before any pending

; interrupt(s)

C Code Example

_SEI(); /* set global interrupt enable */

_SLEEP(); /* enter sleep, waiting for interrupt */

/* note: will enter sleep before any pending interrupt(s) */

2486T–AVR–05/08

ATmega8(L)

The EEPROM Address

EEARL

• Bits 15..9 – Res: Reserved Bits

These bits are reserved bits in the ATmega8 and will always read as zero.

• Bits 8..0 – EEAR8..0: EEPROM Address

The EEPROM Address Registers – EEARH and EEARL – specify the EEPROM address in the

512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and

511. The initial value of EEAR is undefined. A proper value must be written before the EEPROM

may be accessed.

The EEPROM Data

• Bits 7..0 – EEDR7..0: EEPROM Data

For the EEPROM write operation, the EEDR Register contains the data to be written to the

EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the

EEDR contains the data read out from the EEPROM at the address given by EEAR.

The EEPROM Control

• Bits 7..4 – Res: Reserved Bits

These bits are reserved bits in the ATmega8 and will always read as zero.

• Bit 3 – EERIE: EEPROM Ready Interrupt Enable

Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing

EERIE to zero disables the interrupt. The EEPROM Ready interrupt generates a constant inter-

rupt when EEWE is cleared.

• Bit 2 – EEMWE: EEPROM Master Write Enable

The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written.

When EEMWE is set, setting EEWE within four clock cycles will write data to the EEPROM at

the selected address If EEMWE is zero, setting EEWE will have no effect. When EEMWE has

been written to one by software, hardware clears the bit to zero after four clock cycles. See the

description of the EEWE bit for an EEPROM write procedure.

• Bit 1 – EEWE: EEPROM Write Enable

The EEPROM Write Enable Signal EEWE is the write strobe to the EEPROM. When address

and data are correctly set up, the EEWE bit must be written to one to write the value into the

EEPROM. The EEMWE bit must be written to one before a logical one is written to EEWE, oth-

Bit 151413121110 9 8

–––––––EEAR8EEARH

EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL

76543210

Read/WriteRRRRRRRR/W

R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value0000000X

XXXXXXXX

Bit 76543210

MSB LSB EEDR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

Bit 76543210

– – – – EERIE EEMWE EEWE EERE EECR

Read/Write R R R R R/W R/W R/W R/W

Initial Value 0 0 0 0 0 0 X 0

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