SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
detailed description (continued)
constant-frequency mode
When the output current is higher then the LinSkip current threshold, the charge pump runs continuously at the
switching frequency f
(OSC)
. The control circuit, fed from the error amplifier, controls the charge on C1 and C2
by controlling the gates and hence the r
DS(ON)
of the integrated MOSFETs. When the output voltage decreases,
the gate drive increases, resulting in a larger voltage across C1 and C2. This regulation scheme minimizes
output ripple. Since the device switches continuously, the output signal contains well-defined frequency
components, and the circuit requires smaller external capacitors for a given output ripple. However,
constant-frequency mode, due to higher operating current, is less efficient at light loads. For this reason, the
device switches seamlessly into the pulse-skip mode when the output current drops below the LinSkip current
threshold.
pulse-skip mode
The regulator enters the pulse-skip mode when the output current is lower than the LinSkip current threshold
of 7 mA. In the pulse-skip mode, the error amplifier disables switching of the power stages when it detects an
output voltage higher than 3.3 V. The controller skips switching cycles until the output voltage drops below 3.3 V.
Then the error amplifier reactivates the oscillator and switching of the power stages starts again. A 30-mV output
voltage offset is introduced in this mode.
The pulse-skip regulation mode minimizes operating current because it does not switch continuously and
deactivates all functions except the voltage reference and error amplifier when the output is higher than 3.3 V.
Even in pulse-skip mode the r
DS(ON)
of the MOSFETs is controlled. This way the energy per switching cycle that
is transferred by the charge pump from the input to the output is limited to the minimum that is necessary to
sustain a regulated output voltage, with the benefit that the output ripple is kept to a minimum. When switching
is disabled from the error amplifier, the load is also isolated from the input.
start up and shutdown
During start-up, i.e. when EN is set from logic low to logic high, the output capacitor is directly connected to IN
and charged up with a limited current until the output voltage V
O
reaches 0.8 × V
I
. When the start-up comparator
detects this limit, the converter begins switching. This precharging of the output capacitor guarantees a short
start-up time. In addition, the inrush current into an empty output capacitor is limited. The converter can start
into a full load, which is defined by a 33-Ω or 66-Ω resistor, respectively.
Driving EN low disables the converter. This disables all internal circuits and reduces the supply current to only
0.05 µA. The device exits shutdown once EN is set high. When the device is disabled, the load is isolated from
the input. This is an important feature in battery operated products because it extends the products shelf life.
synchronization to an external clock signal
The operating frequency of the charge pump is limited to 400 kHz in order to avoid interference in the sensitive
455-kHz IF band. The device can either run from the integrated oscillator, or an external clock signal can be used
to drive the charge pump. The maximum frequency of the external clock signal is 800 kHz. The switching
frequency used internally to drive the charge pump power stages is half of the external clock frequency. The
external clock signal is applied to the EN pin. The device will switch off if the signal on EN is hold low for more
than 10 µs.
When the load current drops below the LinSkip current threshold, the devices will enter the pulse-skip mode
but stay synchronized to the external clock signal.