TI-TPS60205：高效能3.3V升压转换器技术规格
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TI-TPS60205是一款由德州仪器（Texas Instruments）推出的电源管理集成电路，主要适用于电池供电的应用中，如便携式音频播放器、微处理器系统、备用电池升压转换器和个人数字助理等。该芯片设计紧凑，性能高效，具有以下关键特点：
1. 固定3.3V输出电压：TPS60205能够在1.8V至3.6V的输入电压范围内提供高达100mA的输出电流，满足低功耗电子设备的电源需求。
2. 极低的输出电压纹波：采用推挽拓扑结构，该芯片实现了小于5mV（峰峰值）的输出电压波动，确保了电源的稳定性和系统性能。
3. 集成的低电量和电源良好检测器：内置的低电池和电源良好检测功能，可帮助系统监控电源状态并及时采取相应措施。
4. 频率同步功能：用户可以将开关频率与外部时钟信号同步，以优化系统设计和降低电磁干扰。
5. 高效率与低静态电流：高达90%的效率使得电池使用时间更长，同时在待机模式下仅需35μA的静态电流，大大延长了电池寿命。
6. 无电感器设计：易于设计且成本较低，由于无需使用电感器，降低了电磁干扰（EMI），简化了电路设计。
7. 超低关断电流：在关断模式下，关断电流仅为0.05μA，确保负载与电池隔离，提高了系统的能效。
8. 小型封装：采用10引脚微型小外形封装（MSOP），仅需四个外部电容器，使得解决方案尺寸极其紧凑。
9. 评估模块：为了方便开发者进行原型验证，TI提供了TPS60200EVM-145评估模块，便于快速评估和设计集成。
这些特性使得TI-TPS60205成为便携式设备电源管理的理想选择，特别是在空间有限且对效率和电源稳定性要求高的应用中。其设计考虑了电源的效率、尺寸、成本以及电磁兼容性，从而在各种电池供电的便携式电子产品中发挥重要作用。
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
detailed description (continued)
constant-frequency mode
When the output current is higher then the LinSkip current threshold, the charge pump runs continuously at the
switching frequency f
(OSC)
. The control circuit, fed from the error amplifier, controls the charge on C1 and C2
by controlling the gates and hence the r
DS(ON)
of the integrated MOSFETs. When the output voltage decreases,
the gate drive increases, resulting in a larger voltage across C1 and C2. This regulation scheme minimizes
output ripple. Since the device switches continuously, the output signal contains well-defined frequency
components, and the circuit requires smaller external capacitors for a given output ripple. However,
constant-frequency mode, due to higher operating current, is less efficient at light loads. For this reason, the
device switches seamlessly into the pulse-skip mode when the output current drops below the LinSkip current
threshold.
pulse-skip mode
The regulator enters the pulse-skip mode when the output current is lower than the LinSkip current threshold
of 7 mA. In the pulse-skip mode, the error amplifier disables switching of the power stages when it detects an
output voltage higher than 3.3 V. The controller skips switching cycles until the output voltage drops below 3.3 V.
Then the error amplifier reactivates the oscillator and switching of the power stages starts again. A 30-mV output
voltage offset is introduced in this mode.
The pulse-skip regulation mode minimizes operating current because it does not switch continuously and
deactivates all functions except the voltage reference and error amplifier when the output is higher than 3.3 V.
Even in pulse-skip mode the r
DS(ON)
of the MOSFETs is controlled. This way the energy per switching cycle that
is transferred by the charge pump from the input to the output is limited to the minimum that is necessary to
sustain a regulated output voltage, with the benefit that the output ripple is kept to a minimum. When switching
is disabled from the error amplifier, the load is also isolated from the input.
start up and shutdown
During start-up, i.e. when EN is set from logic low to logic high, the output capacitor is directly connected to IN
and charged up with a limited current until the output voltage V
O
reaches 0.8 × V
I
. When the start-up comparator
detects this limit, the converter begins switching. This precharging of the output capacitor guarantees a short
start-up time. In addition, the inrush current into an empty output capacitor is limited. The converter can start
into a full load, which is defined by a 33-Ω or 66-Ω resistor, respectively.
Driving EN low disables the converter. This disables all internal circuits and reduces the supply current to only
0.05 µA. The device exits shutdown once EN is set high. When the device is disabled, the load is isolated from
the input. This is an important feature in battery operated products because it extends the products shelf life.
synchronization to an external clock signal
The operating frequency of the charge pump is limited to 400 kHz in order to avoid interference in the sensitive
455-kHz IF band. The device can either run from the integrated oscillator, or an external clock signal can be used
to drive the charge pump. The maximum frequency of the external clock signal is 800 kHz. The switching
frequency used internally to drive the charge pump power stages is half of the external clock frequency. The
external clock signal is applied to the EN pin. The device will switch off if the signal on EN is hold low for more
than 10 µs.
When the load current drops below the LinSkip current threshold, the devices will enter the pulse-skip mode
but stay synchronized to the external clock signal.
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