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首页SIM8202G-M2 5G模块硬件设计V1.06:用户指南
SIM8202G-M2 5G模块硬件设计V1.06:用户指南
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更新于2024-07-10
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SIM8202G-M2是一款由SIMCom Wireless Solutions Limited提供的5G模块,其硬件设计文档名为"SIM8202G-M2 Hardware Design V1.06"。该文档于2021年1月7日发布,适用于版本1.06,旨在支持客户对SIM8202G-M2模块的开发和应用工作。SIMCom作为供应商,通过这份文档分享技术信息,但强调所提供的内容仅基于客户特定需求,并非独立验证的结果。 文档中提到,SIMCom并未对产品的系统验证进行广泛的电子系统集成,这方面的责任在于客户或系统集成商。这意味着在实际应用中,用户需要根据自身系统的具体情况进行适配和测试。所有提供的规格可能随时会有所变更,因此在使用前应确保获取最新的文档信息。 版权方面,该文档包含SIMCom的专有技术信息,未经许可不得复制、分发或用于商业用途。对于那些依赖此文档进行产品设计和工程实施的客户,需要确保遵循相关法律法规,尊重知识产权,并在必要时与SIMCom取得联系以获得进一步的技术支持和指导。 SIM8202G-M2 Hardware Design V1.06是一个关键资源,它为用户提供了关于SIM8202G-M2 5G模块的详细设计参数、接口信息以及注意事项,帮助开发者理解和优化模块在实际应用中的性能和兼容性。在使用过程中,用户需注意版本更新和责任归属,以确保项目的顺利进行。
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SIM8202G-M2 Hardware Design V1.06
www.simcom.com
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2. Package Information
2.1 Pin Assignment Overview
SIM8202G-M2 has 75 pins, including 8 notch pins. Customer design should match pins functions. The
following figure is the pin assignment of the module.
Figure 2: Pin assignment
![](https://csdnimg.cn/release/download_crawler_static/18464616/bge.jpg)
SIM8202G-M2 Hardware Design V1.06
www.simcom.com
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2.2 Pin Description
Table 3: IO parameters definition
Pin type
Description
PI
Power Input
PO
Power Output
AI
Analog Input
AIO
Analog Input/Output
DIO
Bidirectional Digital Input /Output
DI
Digital Input
DO
Digital Output
DOH
Digital Output with High level
DOL
Digital Output with Low level
PU
Pull Up
PD
Pull Down
OD
Open Drain
OC
Open Collector
Table 4: DC parameters definition
Voltage
domain
Parameter
Min
Type
Max
P3
VDD_P3=1.8V
VOH
High level output
1.35V
-
1.8V
VOL
Low level output
0V
-
0.45V
VIH
High level input
1.26V
1.8V
2.1V
VIL
Low level input
0V
-
0.54V
Rp
Pull up/down
resistor
20K ohm
-
60K ohm
P4/P5
VDD_P4/P5=1.8V
VOH
High level output
1.44V
-
1.8V
VOL
Low level output
0V
-
0.4V
VIH
High level input
1.26V
-
1.95V
VIL
Low level input
0V
-
0.36V
Rp
Pull up/down
resistor
10K ohm
-
100K ohm
VDD_P4/P5=3.0V
VOH
High level output
2.4V
-
3.0V
VOL
Low level output
0V
-
0.4V
VIH
High level input
2.1V
-
3.05V
VIL
Low level input
0V
-
0.6V
Rp
Pull up/down
10K ohm
100K ohm
![](https://csdnimg.cn/release/download_crawler_static/18464616/bgf.jpg)
SIM8202G-M2 Hardware Design V1.06
www.simcom.com
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Table 5: Pin description
Pin name
Pin
no.
Electrical
description
Description
Comment
Power supply
VBAT
2,4,70,7
2,74
PI
Power supply
Range
:
3.135~4.4V
Typical:3.8V
These pins should be
connected together to
withstand sufficent
current
GND
3,5,11,2
7,33,39,
45,51,5
7,71,73
Ground
System control
FULL_CARD_PO
WER_OFF#
6
DI,PD
High level: the module
power on
Low level: the module
power off
It’s 3.3V tolerant but can
be driven by either 1.8V
or 3.3V GPIO
RESET#
67
P3
DI,PU
System reset control input
Active low
RESET# has been
pulled up to 1.8V
internally
W_DISABLE1#
8
DI
WWAN RF disable
Active low
3.3V tolerant but can be
driven by either 1.8V or
3.3V GPIO
W_DISABLE2#
(
TDD_SYNC_PPS
)
26
P3
DI,DO
W_DISABLE2# and
TDD_SYNC_PPS function
can compatible PIN26 of
SIM8202G-M2
About more detail
please contact SIMCom
support teams
WoWWAN#
23
OD
Wake on the host
Active low
Configuration pins
CONFIG_0
21
GND
Connected to ground
internally
The module is
configured as the
WWAN USB3.1
interface type
CONFIG_1
69
GND
Connected to ground
internally
CONFIG_2
75
GND
Connected to ground
internally
CONFIG_3
1
NC
Not connected
USB2.0/USB3.1
USB_D+
7
AIO
Differential USB
bi-directional data positive
Main communication
interface
USB3.1 data rate up to
10Gbps
USB2.0 data rate up to
480Mbps
USB_D-
9
AIO
Differential USB
bi-directional data negative
USB3.1_Tx-
29
AO
USB3.1 transmit data
negative
USB3.1_Tx+
31
AO
USB3.1 transmit data
positive
USB3.1_Rx-
35
AI
USB3.1 receive data
negative
USB3.1_Rx+
37
AI
USB3.1 receive data
positive
PCIe interface
![](https://csdnimg.cn/release/download_crawler_static/18464616/bg10.jpg)
SIM8202G-M2 Hardware Design V1.06
www.simcom.com
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PETn0
41
AO
PCIe transmit data
negative
Support PCIe Gen 3.0,
data rate up to 8Gbps.
If unused, please keep
open
PETp0
43
AO
PCIe transmit data positive
PERn0
47
AI
PCIe receive data negative
PERp0
49
AI
PCIe receive data positive
REFCLKN
53
AIO
PCIe reference clock
negative
REFCLKP
55
AIO
PCIe reference clock
positive
PCIe assistant interface
PERST#
50
DI
PCIe reset signal
Active low
3.3V voltage domain,
CLKREQ# and
PEWAKE# required pull
up external,
Default as EP mode,
If unused, please keep
open
CLKREQ#
52
DIO
PCIe reference clock
request signal
Active low
PEWAKE#
54
DIO
PCIe wake up control
Active low
(U)SIM interface
(U)SIM1_PWR
36
PO
Power supply for (U)SIM1
card
1.8/3.0V voltage
domain,
(U)SIM interfaces
should be protected
against ESD
,
If unused, please keep
open
(U)SIM1_DATA
34
P4
DIO
(U)SIM1 card data, which
has been pulled up to
(U)SIM1_VDD via a 20KR
resistor internally
(U)SIM1_CLK
32
P4
DO
(U)SIM1 clock signal
(U)SIM1_RESET
30
P4
DO
(U)SIM1 reset control
(U)SIM1_DET
66
P3
DI
(U)SIM1 card detect, which
has been pulled up to
VDD_P3 via a 470KR
resistor internally
(U)SIM2_PWR
48
PO
Power supply for (U)SIM2
card
(U)SIM2_DATA
42
P5
DIO
(U)SIM2 card data, which
has been pulled up to
(U)SIM2_VDD via a 20KR
resistor internally
(U)SIM2_CLK
44
P5
DO
(U)SIM2 clock signal
(U)SIM2_RESET
46
P5
DO
(U)SIM2 reset control
(U)SIM2_DET
40
P3
DI
(U)SIM2 card detect, which
has been pulled up to
VDD_P3 via a 470KR
resistor internally
Antenna control interface
ANTCTL0
59
P3
DO
Antenna tuner control0
1.8V voltage domain. If
unused, please keep
open
ANTCTL1
61
P3
DO
Antenna tuner control1
ANTCTL 2
(RFFE_SDATA)
3
58
P3
DO
(DIO)
Antenna tuner control2
(Antenna tuner MIPI
DATA)
3
ANTCTL3
(RFFE_SCLK)
3
56
P3
DO
Antenna tuner control3
(Antenna tuner MIPI CLK)
3
I2S interface
I2S_CLK
20
P3
DO
I2S clock output
1.8V voltage domain,
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