SMBIOS 3.4.0a规范:BIOS工程师必读的工作进展文档

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"SMBIOS_DSP0134_3.4.0a.pdf"文档是关于System Management BIOS (SMBIOS) 的最新规范,发布于2019年10月31日,版本号为3.4.0a。这份文档对于BIOS开发工程师来说是不可或缺的参考资料,特别强调结合代码实践能更好地理解其内容。SMBIOS 是一种系统管理标准,它定义了硬件组件和系统元数据在计算机主板上的组织方式,以便操作系统和其他系统管理工具能够识别和交互。 文档的主要内容包括: 1. 文档标识符:DSP0134,表明这是一个特定的SMBIOS标准提案。 2. 文档状态:Work in Progress(工作进行中),这意味着这份规范还在发展阶段,可能会有重大变更且不保证最终成为正式标准。这提醒读者在查看时应意识到可能存在不确定性。 3. 替代版本:文档基于3.3.0版本进行更新,说明之前的规范已经被这一版替代。 4. 类型:DocumentClass为Normative,意味着它是规范性文档,提供了详细的指导和要求。 5. 语言:DocumentLanguage为en-US,表示文档主要使用英语编写。 对于Work in Progress版本的声明中,强调这份文档并非最终标准,其观点可能并不代表DMTF(Desktop Management Task Force,桌面管理任务组)的所有成员立场。由于处于草稿阶段,用户可以通过DMTF的反馈门户(http://www.dmtf.org/standards/feedback)提供评论和建议,直到该规范被正式取代。 版权信息部分指出,所有内容受2000、2002、2004年至2019年DMTF的版权保护,非会员和会员都可以复制和使用DMTF的规格和文档,但必须给予正确的归属和引用。 SMBIOS_DSP0134_3.4.0a.pdf文档为SMBIOS技术开发者提供了关于设备描述和管理的详细框架,了解并遵循其中的规定对于实现兼容性和提高系统管理效率至关重要。在实际应用中,开发人员需要密切关注后续的更新和反馈,确保他们的产品符合最新的SMBIOS规范。
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System Management BIOS (SMBIOS) Reference 6 Specification 7 Supersedes: 3.1.1 8 Document Class: Normative 9 Document Status: Published 10 Document Language: en-US 11System Management BIOS (SMBIOS) Reference Specification DSP0134 2 Published Version 3.2.0 12 Copyright Notice 13 Copyright © 2000, 2002, 2004–2016 Distributed Management Task Force, Inc. (DMTF). All rights 14 reserved. 15 DMTF is a not-for-profit association of industry members dedicated to promoting enterprise and systems 16 management and interoperability. Members and non-members may reproduce DMTF specifications and 17 documents, provided that correct attribution is given. As DMTF specifications may be revised from time to 18 time, the particular version and release date should always be noted. 19 Implementation of certain elements of this standard or proposed standard may be subject to third party 20 patent rights, including provisional patent rights (herein "patent rights"). DMTF makes no representations 21 to users of the standard as to the existence of such rights, and is not responsible to recognize, disclose, 22 or identify any or all such third party patent right, owners or claimants, nor for any incomplete or 23 inaccurate identification or disclosure of such rights, owners or claimants. DMTF shall have no liability to 24 any party, in any manner or circumstance, under any legal theory whatsoever, for failure to recognize, 25 disclose, or identify any such third party patent rights, or for such party’s reliance on the standard or 26 incorporation thereof in its product, protocols or testing procedures. DMTF shall have no liability to any 27 party implementing such standard, whether such implementation is foreseeable or not, nor to any patent 28 owner or claimant, and shall have no liability or responsibility for costs or losses incurred if a standard is 29 withdrawn or modified after publication, and shall be indemnified and held harmless by any party 30 implementing the standard from any and all claims of infringement by a patent owner for such 31 implementations. 32 For information about patents held by third-parties which have notified the DMTF that, in their opinion, 33 such patent may relate to or impact implementations of DMTF standards, visit 34 http://www.dmtf.org/about/policies/disclosures.php. 35 This document’s normative language is English. Translation into other languages is permitted.DSP0134 System Management BIOS (SMBIOS) Reference Specification Version 3.2.0 Published 3 36 CONTENTS 37 Foreword ....................................................................................................................................................... 9 38 Introduction.................................................................................................................................................. 10 39 Document conventions........................................................................................................................ 10 40 Typographical conventions ....................................................................................................... 10 41 Document version number conventions ................................................................................... 10 42 1 Scope .................................................................................................................................................. 13 43 1.1 Supported processor architectures........................................................................................... 13 44 2 Normative references .......................................................................................................................... 13 45 3 Terms and definitions .......................................................................................................................... 15 46 4 Symbols and abbreviated terms.......................................................................................................... 15 47 5 Accessing SMBIOS information .......................................................................................................... 21 48 5.1 General ..................................................................................................................................... 21 49 5.2 Table convention....................................................................................................................... 21 50 5.2.1 SMBIOS 2.1 (32-bit) Entry Point.................................................................................. 22 51 5.2.2 SMBIOS 3.0 (64-bit) Entry Point.................................................................................. 23 52 6 SMBIOS structures.............................................................................................................................. 24 53 6.1 Structure standards................................................................................................................... 24 54 6.1.1 Structure evolution and usage guidelines.................................................................... 25 55 6.1.2 Structure header format............................................................................................... 26 56 6.1.3 Text strings .................................................................................................................. 26 57 6.2 Required structures and data ................................................................................................... 27 58 6.3 SMBIOS fields and CIM MOF properties.................................................................................. 28 59 7 Structure definitions............................................................................................................................. 29 60 7.1 BIOS Information (Type 0)........................................................................................................ 29 61 7.1.1 BIOS Characteristics.................................................................................................... 31 62 7.1.2 BIOS Characteristics Extension Bytes......................................................................... 32 63 7.2 System Information (Type 1) .................................................................................................... 33 64 7.2.1 System — UUID........................................................................................................... 34 65 7.2.2 System — Wake-up Type............................................................................................ 35 66 7.3 Baseboard (or Module) Information (Type 2) ........................................................................... 35 67 7.3.1 Baseboard — feature flags .......................................................................................... 36 68 7.3.2 Baseboard — Board Type ........................................................................................... 37 69 7.4 System Enclosure or Chassis (Type 3) .................................................................................... 37 70 7.4.1 System Enclosure or Chassis Types........................................................................... 39 71 7.4.2 System Enclosure or Chassis States........................................................................... 40 72 7.4.3 System Enclosure or Chassis Security Status ............................................................ 41 73 7.4.4 System Enclosure or Chassis — Contained Elements................................................ 41 74 7.5 Processor Information (Type 4) ................................................................................................ 42 75 7.5.1 Processor Information — Processor Type................................................................... 45 76 7.5.2 Processor Information — Processor Family ................................................................ 46 77 7.5.3 Processor ID field format ............................................................................................. 52 78 7.5.4 Processor Information — Voltage................................................................................ 52 79 7.5.5 Processor Information — Processor Upgrade............................................................. 53 80 7.5.6 Processor Information — Core Count.......................................................................... 55 81 7.5.7 Processor Information — Core Enabled...................................................................... 55 82 7.5.8 Processor Information — Thread Count...................................................................... 56 83 7.5.9 Processor Characteristics............................................................................................ 56 84 7.6 Memory Controller Information (Type 5, Obsolete) .................................................................. 57 85 7.6.1 Memory Controller Error Detecting Method................................................................. 58 86 7.6.2 Memory Controller Error Correcting Capability............................................................ 58 87 7.6.3 Memory Controller Information — Interleave Support................................................. 58System Management BIOS (SMBIOS) Reference Specification DSP0134 4 Published Version 3.2.0 88 7.6.4 Memory Controller Information — Memory Speeds .................................................... 59 89 7.7 Memory Module Information (Type 6, Obsolete) ...................................................................... 59 90 7.7.1 Memory Module Information — Memory Types .......................................................... 60 91 7.7.2 Memory Module Information — Memory Size ............................................................. 60 92 7.7.3 Memory subsystem example ....................................................................................... 61 93 7.8 Cache Information (Type 7) ...................................................................................................... 63 94 7.8.1 Cache Information — Maximum Cache Size and Installed Size ................................. 65 95 7.8.2 Cache Information — SRAM Type .............................................................................. 65 96 7.8.3 Cache Information — Error Correction Type ............................................................... 66 97 7.8.4 Cache Information — System Cache Type ................................................................. 66 98 7.8.5 Cache Information — Associativity.............................................................................. 66 99 7.9 Port Connector Information (Type 8) ........................................................................................ 67 100 7.9.1 Port Information example............................................................................................. 68 101 7.9.2 Port Information — Connector Types .......................................................................... 68 102 7.9.3 Port Types.................................................................................................................... 69 103 7.10 System Slots (Type 9)............................................................................................................... 70 104 7.10.1 System Slots — Slot Type ........................................................................................... 71 105 7.10.2 System Slots — Slot Data Bus Width.......................................................................... 73 106 7.10.3 System Slots — Current Usage................................................................................... 74 107 7.10.4 System Slots — Slot Length ........................................................................................ 74 108 7.10.5 System Slots — Slot ID ............................................................................................... 74 109 7.10.6 Slot Characteristics 1................................................................................................... 75 110 7.10.7 Slot Characteristics 2................................................................................................... 75 111 7.10.8 Segment Group Number, Bus Number, Device/Func