USB 2.0 规范详解及翻译

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"USB 2.0 Specification_带翻译" USB 2.0规范是通用串行总线（Universal Serial Bus）的一个重要版本，由包括Compaq、Hewlett-Packard、Intel、Lucent、Microsoft、NEC、Philips等在内的多家知名公司在2000年4月27日共同修订完成。这个版本的设计目标是服务于产品设计，确保规范的一致性和可实施性，以便制造商能够开发与标准兼容的设备。 USB 2.0在前一版本的基础上进行了多项改进和增强，主要体现在以下几个方面： 1. **速度提升**：USB 2.0的最大数据传输速率达到了480 Mbps（High Speed模式），比USB 1.1的12 Mbps速率提高了40倍，极大地提升了设备间的数据交换速度，适用于高速数据传输的设备如硬盘驱动器、打印机等。 2. **向下兼容**：USB 2.0规范保持了与USB 1.1的兼容性，这意味着USB 2.0接口可以连接USB 1.1设备，而不会导致任何问题或功能损失。 3. **电源管理**：USB 2.0提供了更精细的电源管理机制，允许设备在不使用时进入低功耗状态，从而节省能源。 4. **增强的错误检测和恢复**：规范包含了更强大的错误检测和恢复机制，能够更好地处理数据传输中的错误，提高系统的稳定性和可靠性。 5. **设备分类**：USB 2.0定义了不同类型的设备类，如HID（Human Interface Device，人机交互设备）、CDC（Communications Device Class，通信设备类）等，便于设备的识别和操作。 6. **设备枚举**：USB 2.0的设备枚举过程优化了设备的识别和配置，使得系统能够快速识别并正确配置新连接的设备。 7. **多通道传输**：USB 2.0采用了8b/10b编码方式，通过多通道传输来提高数据吞吐量，同时减少了信号干扰和错误率。 8. **热插拔和即插即用**：USB 2.0继续支持设备的热插拔和即插即用特性，用户可以在设备运行时添加或移除USB设备，无需重启计算机。 9. **扩展的设备支持**：USB 2.0规范增加了对大量不同类型设备的支持，包括扫描仪、数码相机、移动电话等，促进了消费电子产品的标准化和互操作性。修订历史记录展示了USB 2.0规范从初步草案到最终版本的演变过程，包括对各章节的多次修订和完善，确保了规范的成熟度和实用性。 USB 2.0规范的发布极大地推动了USB技术的发展，成为现代计算机和消费电子产品中不可或缺的接口标准。尽管现在USB 3.x和USB 4等更高速的版本已经推出，但USB 2.0仍然广泛应用于各种场景，尤其是对于不需要高速传输的设备来说，它依然是一个经济、可靠的选择。

Universal Serial Bus Specification Revision 2.0

通⽤串⾏总线规范修订版

2.0

CHAPTER 9 USB DEVICE FRAMEWORK

第九章

USB

设备框架

9.1 USB Device States...............................................................................................................................

239

9.1.1 Visible Device States.....................................................................................................................

239

9.1.2 Bus Enumeration ...........................................................................................................................

243

9.2 Generic USB Device Operations .......................................................................................................

244

9.2.1 Dynamic Attachment and Removal...............................................................................................

244

9.2.2 Address Assignment......................................................................................................................

244

9.2.3 Configuration ................................................................................................................................

244

9.2.4 D ata Transfer.................................................................................................................................

245

9.2.5 P ower Management.......................................................................................................................

245

9.2.6 Request Processing........................................................................................................................

245

9.2.7 Request Error ................................................................................................................................

247

9.3 USB Device Requests..........................................................................................................................

248

9.3.1 bmRequestType.............................................................................................................................

248

9.3.2 bRequest ........................................................................................................................................

249

9.3.3 wValue ..........................................................................................................................................

249

9.3.4 w Index...........................................................................................................................................

249

9.3.5 wLength.........................................................................................................................................

249

9.4 Standard Device Requests .................................................................................................................

250

9.4.1 Clear Feature .................................................................................................................................

252

9.4.2 Get Configuration..........................................................................................................................

253

9.4.3 Get Descriptor ...............................................................................................................................

253

9.4.4 Get Interface ..................................................................................................................................

254

9.4.5 Get Status ......................................................................................................................................

254

9.4.6 Set Address....................................................................................................................................

256

9.4.7 Set Configuration ..........................................................................................................................

257

9.4.8 Set Descriptor................................................................................................................................

257

9.4.9 Set Feature.....................................................................................................................................

258

9.4.10 Set Interface...................................................................................................................................

259

9.4.11 Synch Frame..................................................................................................................................

260

9.5 Descriptors ..........................................................................................................................................

260

9.6 Standard USB Descriptor Definitions...............................................................................................

261

9.6.1 Device ...........................................................................................................................................

261

9.6.2 Device_Qualifier ...........................................................................................................................

264

9.6.3 Configuration ................................................................................................................................

264

9.6.4 Other_Speed_Configuration..........................................................................................................

266

9.6.5 Interface.........................................................................................................................................

267

9.6.6 Endpoint ........................................................................................................................................

269

9.6.7 String .............................................................................................................................................

273

9.7 Device Class Definitions .....................................................................................................................

274

9.7.1 Descriptors ....................................................................................................................................

274

9.7.2 Interface(s) and Endpoint Usage ...................................................................................................

274

9.7.3 Requests ........................................................................................................................................

274

Universal Serial Bus Specification Revision 2.0

通⽤串⾏总线规范修订版

2.0

CHAPTER 10 USB HOST: HARDWARE AND SOFTWARE

第⼗章

USB

主机

硬件和软件

10.1 Overview of the USB Host ................................................................................................................

275

10.1.1 Overview ......................................................................................................................................

275

10.1.2 Control Mechanisms.....................................................................................................................

278

10.1.3 Data Flow .....................................................................................................................................

278

10.1.4 Collecting Status and A ctivity Statistics.......................................................................................

279

10.1.5 Electrical Interface Considerations...............................................................................................

279

10.2 Host Controller Requirements .........................................................................................................

279

10.2.1 State Handling ..............................................................................................................................

280

10.2.2 Serializer/Deserializer ..................................................................................................................

280

10.2.3 Frame and Microframe Generation ..............................................................................................

280

10.2.4 Data Processing ............................................................................................................................

281

10.2.5 Protocol Engine ............................................................................................................................

281

10.2.6 Transmission Error Handling .......................................................................................................

282

10.2.7 Remote Wakeup ...........................................................................................................................

282

10.2.8 Root Hub ......................................................................................................................................

282

10.2.9 Host System Interface...................................................................................................................

283

10.3 Overview of Software Mechanisms ..................................................................................................

283

10.3.1 Device Configuration ...................................................................................................................

283

10.3.2 Resource Management .................................................................................................................

285

10.3.3 Data Transfers ..............................................................................................................................

286

10.3.4 Common Data Definitions............................................................................................................

286

10.4

Host Controller Driver ......................................................................................................................

287

10.5

Universal Serial Bus Driver ..............................................................................................................

287

10.5.1 USBD Overview...........................................................................................................................

288

10.5.2 USBD Command Mechanism Requirements ...............................................................................

289

10.5.3 USBD Pipe Mechanisms ..............................................................................................................

291

10.5.4 Managing the USB via the USBD Mechanisms ...........................................................................

293

10.5.5 Passing USB Preboot Control to the Operating System ...............................................................

295

10.6

Operating System Environment Guides ..........................................................................................

296

CHAPTER 11 HUB SPECIFICATION

第⼗⼀章集线器规格

11.1

Overview.............................................................................................................................................

297

11.1.1 Hub Architecture ..........................................................................................................................

297

11.1.2 Hub Connectivity..........................................................................................................................

298

11.2

Hub Frame/Microframe Timer ........................................................................................................

300

11.2.1 High-speed Microframe Timer Range..........................................................................................

300

11.2.2 Full-speed Frame Timer Range ....................................................................................................

301

11.2.3 Frame/Microframe Timer Synchronization ..................................................................................

301

11.2.4 Microframe Jitter Related to Frame Jitter.....................................................................................

303

11.2.5 EOF1 and EOF2 Timing Points....................................................................................................

303

Universal Serial Bus Specification Revision 2.0

通⽤串⾏总线规范修订版

2.0

11.3

Host Behavior at End-of-Frame ........................................................................................................

306

11.3.1

Full-/low-speed Latest Host Packet...............................................................................................

306

11.3.2

Full-/low-speed Packet Nullification.............................................................................................

306

11.3.3

Full-/low-speed Transaction Completion Prediction.....................................................................

306

11.4 Internal Port .......................................................................................................................................

307

11.4.1 Inactive ..........................................................................................................................................

308

11.4.2 Suspend Delay...............................................................................................................................

308

11.4.3 Full Suspend (Fsus) .......................................................................................................................

308

11.4.4 Generate Resume (GResume) .......................................................................................................

308

11.5 Downstream Facing Ports..................................................................................................................

309

11.5.1 Downstream Facing Port State Descriptions .................................................................................

312

11.5.2 Disconnect Detect Timer...............................................................................................................

315

11.5.3 Port Indicator.................................................................................................................................

316

11.6 Upstream Facing Port ........................................................................................................................

318

11.6.1 Full-speed ......................................................................................................................................

318

11.6.2 High-speed ....................................................................................................................................

318

11.6.3 Receiver.........................................................................................................................................

318

11.6.4 Transmitter ....................................................................................................................................

322

11.7 Hub Repeater ......................................................................................................................................

324

11.7.1 H igh-speed Packet Connectivity ...................................................................................................

324

11.7.2 Hub Repeater State Machine .........................................................................................................

327

11.7.3 Wait for Start of Packet from Upstream Port (WFSOPFU) ..........................................................

329

11.7.4 Wait for End of Packet from Upstream Port (WFEOPFU) ...........................................................

330

11.7.5 Wait for Start of Packet (WFSOP) ................................................................................................

330

11.7.6 Wait for End of Packet (WFEOP) .................................................................................................

330

11.8 Bus State Evaluation ..........................................................................................................................

330

11.8.1 Port Error.......................................................................................................................................

330

11.8.2 Speed Detection.............................................................................................................................

331

11.8.3 Collision ........................................................................................................................................

331

11.8.4 Low-speed Port Behavior ..............................................................................................................

331

11.9 Suspend and Resume..........................................................................................................................

332

11.10 Hub Reset Behavior............................................................................................................................

334

11.11 Hub Port Power Control....................................................................................................................

335

11.11.1 Multiple Gangs ..............................................................................................................................

335

11.12 Hub Controller ...................................................................................................................................

336

11.12.1 Endpoint Organization ..................................................................................................................

336

11.12.2 Hub Information Architecture and Operation ...............................................................................

337

11.12.3 Port Change Information Processing.............................................................................................

337

11.12.4 Hub and Port Status Change Bitmap .............................................................................................

338

11.12.5 Over-current Reporting and Recovery ..........................................................................................

339

11.12.6 Enumeration Handling ..................................................................................................................

340

11.13 Hub Configuration ................................................................. ............................................................

340

xii

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Universal Serial Bus Specification Revision 2.0

通⽤串⾏总线规范修订版

2.0

11.14

Transaction Translator .....................................................................................................................

342

11.14.1 Overview ......................................................................................................................................

342

11.14.2 Transaction Translator Scheduling ...............................................................................................

344

11.15 Split Transaction Notation Information ..........................................................................................

346

11.16 Common Split Transaction State Machines ....................................................................................

349

11.16.1 Host Controller State Machine .....................................................................................................

350

11.16.2 Transaction Translator State Machine ..........................................................................................

354

11.17 Bulk/Control Transaction Translation Overview...........................................................................

360

11.17.1 Bulk/Control Split Transaction Sequences ...................................................................................

360

11.17.2 Bulk/Control Split Transaction State Machines ...........................................................................

366

11.17.3 Bulk/Control Sequencing .............................................................................................................

371

11.17.4 Bulk/Control Buffering Requirements .........................................................................................

372

11.17.5 Other Bulk/Control Details...........................................................................................................

372

11.18 Periodic Split Transaction Pipelining and Buffer Management....................................................

372

11.18.1 Best Case Full-Speed Budget .......................................................................................................

373

11.18.2 TT Microframe Pipeline ...............................................................................................................

373

11.18.3 Generation of Full-speed Frames .................................................................................................

374

11.18.4 Host Split Transaction Scheduling Requirements ........................................................................

374

11.18.5 TT Response Generation ..............................................................................................................

378

11.18.6 TT Periodic Transaction Handling Requirements ........................................................................

379

11.18.7 TT Transaction Tracking ..............................................................................................................

380

11.18.8 TT Complete-split Transaction State Searching...........................................................................

381

11.19 Approximate TT Buffer Space Required ........................................................................................

382

11.20 Interrupt Transaction Translation Overview .................................................................................

382

11.20.1 Interrupt Split Transaction Sequences ..........................................................................................

383

11.20.2 Interrupt Split Transaction State Machines ..................................................................................

386

11.20.3 Interrupt OUT Sequencing ...........................................................................................................

392

11.20.4 Interrupt IN Sequencing ...............................................................................................................

393

11.21 Isochronous Transaction Translation Overview ............................................................................

394

11.21.1 Isochronous Split Transaction Sequences ....................................................................................

395

11.21.2 Isochronous Split Transaction State Machines .............................................................................

398

11.21.3 Isochronous OUT Sequencing......................................................................................................

403

11.21.4 Isochronous IN Sequencing..........................................................................................................

404

11.22 TT Error Handling ............................................................................................................................

404

11.22.1 Loss of TT Synchronization With HS SOFs ................................................................................

404

11.22.2 TT Frame and Microframe Timer Synchronization Requirements ..............................................

405

11.23 Descriptors .........................................................................................................................................

407

11.23.1 Standard Descriptors for Hub Class .............................................................................................

407

11.23.2 Class-specific Descriptors ............................................................................................................

417

11.24 Requests..............................................................................................................................................

419

11.24.1 Standard Requests ........................................................................................................................

419

11.24.2 Class-specific Requests ................................................................................................................

420

xiii

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