MT9P006: 1/2.5英寸5Mpx高清CMOS图像传感器特性详解

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"MT9P006数据手册是Aptina公司的一款1/2.5英寸5百万像素的CMOS数码影像传感器的数据规格说明书。这份文档旨在供评估和参考使用，但产品的特性和规格可能会根据Aptina的决定而进行无通知的变更。MT9P006的特点主要包括： 1. 高帧率：传感器支持快速连续拍摄，适合对实时性有高要求的应用，如视频监控和高速运动捕捉。 2. 卓越的低光性能：在光线不足的情况下也能提供出色的图像质量，这得益于其高级的图像处理技术和优化的传感器设计。 3. 低暗电流：较低的暗电流有助于减少噪声，提高在低光照环境下的成像效果。 4. 全局复位释放：通过一次性启动所有行的曝光，确保整体画面一致性，便于后期处理。 5. Bulb模式：支持长时间曝光，用户可以设置任意曝光时间，适合于星空摄影或需要长时间细节捕捉的场景。 6. 快照模式：允许按需拍摄，节省存储空间，提高响应速度。 7. 水平和垂直镜像：支持图像翻转，便于调整显示或满足特定应用的需求。 8. 列和行跳过模式：通过跳过部分像素，可以在不减小视场（Field of View, FOV）的前提下缩小图像尺寸，降低存储压力。 9. 列和行并行处理：当调整分辨率时，利用并行处理技术提高图像质量，减少像素间的关联性问题。 10. 简单两线串行接口：降低了系统集成复杂度，使得与控制器和其他设备连接更加便捷。请注意，这些信息是初步的，并且Aptina保留随时更改产品或规格的权利。获取最新的规格，请访问Aptina的官方网站www.aptina.com。此数据表适用于2010年，实际使用时应确保参考最新版本。"

PDF: 9502963681 /Source: 9683782150 Aptina reserves the right to change products or specifications without notice.

MT9P006_DS - Rev.B Pub. 4/11 EN

MT9P006: 1/2.5-Inch 5Mp Digital Image Sensor

Functional Overview

Aptina Confidential and Proprietary Preliminary

Table 3: Pin Description

Name Type Description

RESET_BAR Input When LOW, the MT9P006 asynchronously resets. When driven HIGH, it resumes normal

operation with all configuration registers set to factory defaults.

EXTCLK Input External input clock.

SCLK Input Serial clock. Pull to V

DD_IO with a 1.5kΩ resistor.

OE Input When HIGH, the PIXCLK, D

OUT, FV, LV, and STROBE outputs enter a High-Z. When driven LOW,

normal operation resumes.

STANDBY_BAR Input Standby. When LOW, the chip enters a low-power standby mode. It resumes normal

operation when the pin is driven HIGH.

TRIGGER Input Snapshot trigger. Used to trigger one frame of output in snapshot modes, and to indicate the

end of exposure in bulb exposure modes.

ADDR Input Serial address. When HIGH, the MT9P006 responds to device ID (BA)

. When LOW, it

responds to serial device ID (90)

DATA I/O Serial data. Pull to VDD_IO with a 1.5kΩ resistor.

PIXCLK Output Pixel clock. The D

OUT, FV, LV, and STROBE outputs should be captured on the falling edge of

this signal.

OUT[11:0] Output Pixel data. Pixel data is 12-bit. MSB (DOUT11) through LSB (DOUT0) of each pixel, to be

captured on the falling edge of PIXCLK.

FRAME_VALID Output Frame valid. Driven HIGH during active pixels and horizontal blanking of each frame and

LOW during vertical blanking.

LINE_VALID Output Line valid. Driven HIGH with active pixels of each line and LOW during blanking periods.

STROBE Output Snapshot strobe. Driven HIGH when all pixels are exposing in snapshot modes.

DD Supply Digital supply voltage. Nominally 1.8V.

DD_IO Supply IO supply voltage. Nominally 1.8 or 2.8V.

DGND Supply Digital ground.

AA Supply Analog supply voltage. Nominally 2.8V.

VAA_PIX Supply Pixel supply voltage. Nominally 2.8V, connected externally to V

AA.

AGND Supply Analog ground.

DD_PLL Supply PLL supply voltage. Nominally 2.8V, connected externally to VAA.

TEST — Tie to A

GND for normal device operation (factory use only).

RSVD — Tie to D

GND for normal device operation (factory use only).

NC — No connect.

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