CLRC663接触式读写器IC详细规格与功能介绍

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NXP的RC663数据手册提供了对这款高度集成的接触式读写器/通信IC的深入理解。CLRC663专为13.56MHz无接触通信设计，适用于多种国际标准，包括ISO/IEC 14443A、MIFARE协议，以及ISO/IEC 14443B，这使得它能够在各种类型的RFID应用中实现高效的数据交换。在ISO/IEC 14443A模式下，内置的发射器能够驱动兼容的天线与MIFARE卡和应答器进行通信，而无需额外的有源电路，确保了低功耗操作。该芯片支持被动发起模式（ISO/IEC 18092），这意味着它可以被外部设备激活并进行数据交互，这对于许多物联网(IoT)和智能卡场景来说非常实用。此外，RC663还支持ISO/IEC 15693，这是一种用于远距离识别应用的标准，如车辆入口系统或图书管理。在电子标签(EPC)标准方面，CLRC663可以处理ICODE EPC UID/EPC OTP（唯一标识符和一次性密码）的读写，以及ISO/IEC 18000-3模式3/EPC Class-1 HF，这些特性使其适用于供应链管理和物品追踪。值得注意的是，它还兼容MIFARE Classic（1K和4K版本）、MIFARE Ultralight、MIFARE Ultralight C和MIFARE PLUS等知名MIFARE系列，这些都是广泛应用于公共交通、门禁控制和支付系统的卡型。数字模块负责整个ISO/IEC 14443A帧结构的管理和错误检测，包括奇偶校验和循环冗余检查(CRC)，确保了数据传输的准确性和可靠性。NXP RC663是一款功能强大且灵活的接触式读写器IC，满足了不同应用场景对高效、兼容性和安全性的要求，是现代无接触技术解决方案的重要组成部分。

Product data sheet

COMPANY PUBLIC

Rev. 3.6 — 10 September 2013

171136 16 of 137

NXP Semiconductors

CLRC663

High performance NFC reader solution

8.3.5 EPC-UID/UID-OTP functionality

The physical parameters are described in Table 11.

Data coding and framing according to EPC global 13.56 MHz ISM (industrial, scientific

and medical) Band Class 1 Radio Frequency Identification Tag Interface Specification

(Candidate Recommendation, Version 1.0.0).

8.3.6 ISO/IEC 18000-3 mode 3/ EPC Class-1 HF functionality

The ISO/IEC 18000-3 mode 3/ EPC Class-1 HF is not described in this document. For a

detailed explanation of the protocol, refer to the ISO/IEC 18000-3 mode 3/ EPC Class-1

HF standard.

8.3.7 ISO/IEC 18092 mode

The CLRC663 supports Passive Initiator Communication mode at the transfer speeds

106 kbit/s, 212 kbit/s and 424 kbit/s as defined in the ISO/IEC 18092 standard.

• Passive communication mode means that the target answers to an initiator command

in a load modulation scheme. The initiator is active in terms of generating the RF field.

• Initiator: generates RF field at 13.56 MHz and starts the ISO/IEC 18092

communication.

• Target: responds to initiator command either in a load modulation scheme in Passive

communication mode or using a self generated and self modulated RF field for Active

Communication mode.

Table 11. Communication overview for EPC/UID

Communication

direction

Signal type Transfer speed

26.48 kbit/s 52.96 kbit/s

Reader to card (send

data from the

CLRC663 to a card)

reader side modulation 10 % to 30 % ASK

bit encoding RTZ

bit length 37.76 s

Card to reader

(CLRC663 receives

data from a card)

card side modulation single subcarrier load

modulation

bit length 18.88 s

bit encoding Manchester coding

Product data sheet

COMPANY PUBLIC

Rev. 3.6 — 10 September 2013

171136 18 of 137

NXP Semiconductors

CLRC663

High performance NFC reader solution

8.3.7.2 ISO/IEC 18092 framing and coding

The ISO/IEC 18092 framing and coding in Passive communication mode is defined in the

ISO/IEC 18092 standard.

8.3.7.3 ISO/IEC 18092 protocol support

The ISO/IEC 18092 protocol is not described in this document. For a detailed explanation

of the protocol, refer to the ISO/IEC 18092 standard.

8.3.8 EPC Class-1 HF and ICODE

8.3.8.1 Data encoding ICODE

The ICODE protocols have mainly three different methods of data encoding:

• “1” out of “4” coding scheme

• “1” out of “256” coding scheme

• “Return to Zero” (RZ) coding scheme

Data encoding for all three coding schemes is done by the ICODE generator.

The supported EPC Class-1 HF modes are:

• 2 pulse for 424 kbit subcarrier

• 4 pulse for 424 kbit subcarrier

• 2 pulse for 848 kbit subcarrier

• 4 pulse for 848 kbit subcarrier

8.4 Host interfaces

8.4.1 Host interface configuration

The CLRC663 supports direct interfacing of various hosts as the SPI, I

C, I

CL and serial

UART interface type. The CLRC663 resets its interface and checks the current host

interface type automatically having performed a power-up or resuming from power down.

The CLRC663 identifies the host interface by the means of the logic levels on the control

pins after the Cold Reset Phase. This is done by a combination of fixed pin

connections.The following table shows the possible configurations defined by

IFSEL1,IFSEL0:

Table 13. Framing and coding overview

Transfer speed Framing and Coding

106 kbit/s According to the ISO/IEC 14443A/MIFARE scheme

212 kbit/s According to the FeliCa scheme

424 kbit/s According to the FeliCa scheme

Table 14. Connection scheme for detecting the different interface types

Pin Pin Symbol UART SPI I

C I

C-L

28 IF0 RX MOSI ADR1 ADR1

29 IF1 - SCK SCL SCL

30 IF2 TX MISO ADR2 SDA

Product data sheet

COMPANY PUBLIC

Rev. 3.6 — 10 September 2013

171136 19 of 137

NXP Semiconductors

CLRC663

High performance NFC reader solution

8.4.2 SPI interface

8.4.2.1 General

The CLRC663 acts as a slave during the SPI communication. The SPI clock SCK has to

be generated by the master. Data communication from the master to the slave uses the

Line MOSI. Line MISO is used to send data back from the CLRC663 to the master.

A serial peripheral interface (SPI compatible) is supported to enable high speed

communication to a host. The implemented SPI compatible interface is according to a

standard SPI interface. The SPI compatible interface can handle data speed of up to 10

Mbit/s. In the communication with a host CLRC663 acts as a slave receiving data from the

external host for register settings and to send and receive data relevant for the

communication on the RF interface.

On both data lines (MOSI, MISO) each data byte is sent by MSB first. Data on MOSI line

shall be stable on rising edge of the clock line (SCK) and is allowed to change on falling

edge. The same is valid for the MISO line. Data is provided by the CLRC663 on the falling

edge and is stable on the rising edge.The polarity of the clock is low at SPI idle.

8.4.2.2 Read data

To read out data from the CLRC663 by using the SPI compatible interface the following

byte order has to be used.

The first byte that is sent defines the mode (LSB bit) and the address.

Remark: The Most Significant Bit (MSB) has to be sent first.

31 IF3 1 NSS SDA ADR2

26 IFSEL0 0 0 1 1

27 IFSEL1 0 1 0 1

Table 14. Connection scheme for detecting the different interface types

Pin Pin Symbol UART SPI I

C I

C-L

Fig 12. Connection to host with SPI

001aal998

READER IC

IF1

SCK

IF0

MOSI

IF2

MISO

IF3

NSS

Table 15. Byte Order for MOSI and MISO

byte 0 byte 1 byte 2 byte 3 to n-1 byte n byte n+1

MOSI address 0 address 1 address 2 …….. address n 00h

MISO X data 0 data 1 …….. data n  1data n

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