低功耗AS3911 NFC读卡器芯片：高效集成与自动天线调谐

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AS3911数据手册详细介绍了ams公司的一款高度集成的近场通信（NFC）发起器/高频（HF）读卡器集成电路。这款芯片以其独特的设计在业内脱颖而出，特别关注低功耗性能。AS3911集成了模拟前端（AFE）和完整的数据帧系统，支持ISO18092（NFC IP-1）发起者、活动目标模式以及ISO14443A和B标准卡片读取，甚至包括高速率的FeliCa™读卡功能。它还支持其他标准和定制协议，通过AFE和外部微控制器的帧处理实现。与主要针对移动电话设计的NFC设备不同，AS3911专为NFC系统基础设施侧设计，这里对射频性能、灵活性和低功耗需求极高。ams的独特自动天线调谐技术是其亮点，使得设备能优化直接驱动天线的应用场景。与其他HF读卡器集成电路相比，AS3911拥有两个差分低阻抗（1Ω）天线驱动器，这是它的独特之处。为了满足低功耗应用的需求，AS3911在唤醒模式下仅需5微安电流，只需感知到标签就可激活，显著降低了能耗。此外，它提供的1瓦输出功率可以免去外部升压电路的需求，这对于需要650毫瓦功率的信用卡/借记卡读取设备尤其有利，因为它简化了系统设计并降低了成本。 AS3911的高集成度和专门的天线管理特性使得在典型系统中，可以显著减少硬件组件的数量和复杂性，从而降低了整体系统的成本。这使得AS3911成为在基础设施环境中寻求高效、灵活且节能的NFC解决方案的理想选择。AS3911数据手册提供了关于如何利用这款芯片实现高性能、低成本的NFC应用的全面指南。

AS3911 – 16 ams Datasheet, Confidential: 2013-Oct [2-03]

Application Information

SPI Interface

A 4-wire Serial Peripheral Interface (SPI) is used for

communication between external microcontroller and the

AS3911.

Operating Modes

The AS3911 operating mode is defined by the contents of the

Operation Control Register.

At power-up all bits of the Operation Control Register are set to

0, the AS3911 is in Power-down mode. In this mode AFE static

power consumption is minimized, only the POR and part of the

bias are active, the regulators are transparent and are not

operating. The SPI is still functional in this mode so all settings

of ISO mode definition and configuration registers can be done.

Control bit en (bit 7 of the Operation Control Register) is

controlling the quartz crystal oscillator and regulators. When

this bit is set, the device enters in Ready mode. In this mode

the quartz crystal oscillator and regulators are enabled. An

interrupt is sent to inform the microcontroller when the

oscillator frequency is stable.

Enable of Receiver and Transmitter are separated so it is

possible to operate one without switching on the other (control

bits rx_en and tx_en). In some cases this may be useful, in case

the reader field has to be maintained and there is no

transponder response expected receiver can be switched-off to

save current. Another example is NFCIP-1 active

communication receive mode in which RF field is generated by

the initiator and only Receiver operates.

Asserting the Operation Control Register bit wu while the other

bits are set to 0 puts the AS3911 into the Wake-up mode which

is used to perform low power detection of card presence. In this

mode the low power RC oscillator and register configurable

Wake-up timer are used to schedule periodic measurement(s).

When a difference to the predefined reference is detected an

interrupt is sent to wake-up the micro. Capacitive sensor, phase

measurement and amplitude measurement are available.

Transmitter

The Transmitter contains two identical push-pull driver blocks

connected to the pins RFO1 and RFO2. These drivers are

differentially driving external antenna LC tank. It is also possible

to operate only one of the two drivers by setting the IO

Configuration Register 1 bit single. Each driver is composed of

8 segments having binary weighted output resistance. The MSB

segment typical ON resistance is 2Ω, when all segments are

turned on; the output resistance is typically 1Ω. Usually all

segments are turned on to define the normal transmission

(non-modulated) level. It is also possible to switch off certain

Application Information

ams Datasheet, Confidential: 2013-Oct [2-03] AS3911 – 17

Application Information

segments when driving the non-modulated level to reduce the

amplitude of signal on the antenna and/or to reduce the

antenna Q factor without making any hardware changes. The

RFO Normal Level Definition Register defines which segments

are turned on to define the normal transmission

(non-modulated) level. Default setting is that all segments are

turned on.

Using the single driver mode the number and therefore the cost

of the antenna LC tank components is halved, but also the

output power is reduced. In single mode it possible to connect

two antenna LC tanks to the two RFO outputs and multiplex

between them by controlling the IO Configuration Register 1

bit rfo2.

In order to transmit the data the transmitter output level needs

to be modulated. The AM and OOK modulation are supported.

The type of modulation is defined by setting the bit tr_am in

the Auxiliary Definition Register. For the operation modes

supported by the AS3911 framing the setting of modulation

type is done automatically by sending direct command Analog

Preset.

During the OOK modulation (for example ISO14443A) the

Transmitter drivers stop driving the carrier frequency; drivers

are frozen in state before the modulation. As consequence the

amplitude of the antenna LC tank oscillation decays, the time

constant of the decay is defined with the LC tank Q factor. The

decay time in case of OOK modulation can be shortened by

asserting the Auxiliary Definition Register bit ook_hr. When this

bit is set to logic one the drivers are put in tristate during the

OOK modulation.

AM modulation (for example ISO14443B) is done by increasing

the output driver impedance during the modulation time. This

is done by reducing the number of driver segments which are

turned on. The AM modulated level can be automatically

adjusted to the target modulation depth by defining the target

modulation depth in the AM Modulation Depth Control

command. Please refer to AM Modulation Depth: Definition and

Calibration for further details.

Slow Transmitter Ramping

When transmitter is enabled it starts to drive the antenna LC

tank with full power, the ramping of field emitted by antenna

is defined by antenna LC tank Q factor.

However there are some reader systems where the reader field

has to transition with a longer transition time when it is

enabled. The STIF (Syndicat des transports d'Ile de France)

specification requires a transition time from 10% to 90% of field

longer than or equal to 10 μs.

The AS3911 supports that feature. It is realized by collapsing

VSP_RF regulated voltage when transmitter is disabled and

ramping it when transmitter is enabled. Typical transition time

is 15 μs at 3V supply and 20 μs at 5V supply.

AS3911 – 18 ams Datasheet, Confidential: 2013-Oct [2-03]

Application Information

Procedure to implement the slow transition:

• When transmitter is disabled set IO Configuration Register

2 bit slow_up to 1. Keep this state at least 2 ms to allow

discharge of VSP_RF.

• Enable transmitter, its output will ramp slowly.

• Before sending any command set the bit slow_up back

to 0.

Receiver

The receiver performs demodulation of the transponder

sub-carrier modulation which is superimposed on the

13.56MHz carrier frequency. It performs AM and/or PM

demodulation, amplification, band-pass filtering and

digitalization of sub-carrier signals. Additionally it performs

RSSI measurement, automatic gain control (AGC) and Squelch

function.

In typical application the Receiver inputs RFI1 and RFI2 are

outputs of capacitor dividers connected directly to the

terminals of antenna coil. Such concept assures that the two

input signals are in phase to the voltage on antenna coil. Care

has to be taken during design of capacitive divider that the RFI1

and RFI2 input signal pp value does not exceed the VSP_A

supply voltage.

Receiver comprises two complete receive channels for AM

demodulation and PM demodulation. In case both channels are

active the selection of channel used for reception framing is

done automatically by receive framing logic. The receiver is

switched on when Operation Control Register bit rx_en is set to

one. Additionally the Operation Control Register contains bits

rx_chn and rx_man; rx_chn defines whether both, AM and PM,

demodulation channels will be active or only one of them, while

bit rx_man defines the channel selection mode in case both

channels are active (automatic or manual). Operation of the

Receiver is controlled by four Receiver Configuration registers.

The operation of the receiver is additionally controlled by the

signal rx_on which is set high when modulated signal is

expected on the receiver input. This signal is used to control

RSSI and AGC and also enables processing of receiver output

by Framing logic. Signal rx_on is automatically set high after

Mask Receive timer expires. Signal rx_on can also be directly

controlled by the controller by sending direct commands Mask

Receive Data and Unmask Receive Data. Figure 12 illustrates the

Receiver block diagram.

Demodulation Stage

First stage performs demodulation of transponder sub-carrier

response signal, which is superimposed on HF field carrier. Two

different blocks are implemented for AM demodulation: Peak

Detector and AM demodulator mixer. The choice of the

demodulator, which is used, is made by the Receiver

Configuration Register 1 bit amd_sel.

AS3911 – 20 ams Datasheet, Confidential: 2013-Oct [2-03]

Application Information

Filtering and Gain Stages

The receiver chain has band pass filtering characteristics.

Filtering is optimized to pass sub-carrier frequencies while

rejecting carrier frequency and low frequency noise and DC

component. Filtering and gain is implemented in three stages

where the first and the last stage have the first order high pass

characteristics, while the mid stage has second order low pass

characteristic.

Gain and filtering characteristics can be optimized for current

application by writing the Receiver Configuration Register 1

(filtering), Receiver Configuration Register 3 (gain in first stage)

and Receiver Configuration Register 4 (gain in second and third

stage).

Gain of first stage is about 20dB and can be reduced in six 2.5

dB steps. There is also a special boost mode available, which

boosts the maximum gain for additional 5.5 dB. In case of VHBR

(fc/8 and fc/4) the gain is lower. The first stage gain can only be

modified by writing Receiver Configuration Register 3. The

default setting of this register is the minimum gain. Default first

stage zero is located at 60 kHz, it can also be lowered to 40kHz

or 12 kHz by writing option bits in the Receiver Configuration

with common control bits (see Figure 14).

Gain in the second and third stage is 23 dB and can be reduced

in six 3 dB steps. Gain of these two stages is included in AGC

and Squelch loops or can be manually set in Receiver

Configuration Register 4. Sending of direct command Reset Rx

Gain is necessary to initialize the AGC, Squelch and RSSI block.

Sending this command clears the current Squelch setting and

loads the manual gain reduction from Receiver Configuration

characteristic, the pass band is adjusted according to

sub-carrier frequency using the bits lp2 to lp0 of the Receiver

Configuration Register 1. See Figure 13 for -1dB cut-off

frequency for different settings.

Figure 13:

Low Pass Control

rec1<5> lp2 rec1<4> lp1 rec1<3> lp0 -1 dB point

0 0 0 1200 kHz

001600 kHz

010300 kHz

1002 MHz

101 7 MHz

Other Not used

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