NXP LPC1778 微控制器用户手册：工业与医疗系统应用

需积分: 18 197 浏览量更新于2024-07-18 1 收藏 5MB PDF 举报

"NXP LPC1778 用户手册 (UM10470) - 这是一份关于NXP LPC1778 微控制器的详细用户指南，涵盖了该芯片的各种功能和应用领域，适用于工业控制和医疗系统。" NXP LPC1778是一款基于ARMCortex-M3内核的32位微控制器，它拥有丰富的外设资源，使其在各种复杂系统中表现出色。以下是对这款微控制器主要特性的详细说明： 1. **LCD控制器**：LPC1778内置LCD控制器，能够直接驱动液晶显示屏，支持多种显示模式，为设计带有图形界面的嵌入式系统提供了便利。 2. **以太网EMAC**：集成10/100Mbps以太网媒体访问控制器（EMAC），使得LPC1778能够轻松接入网络，适合需要网络通信的设备。 3. **USB控制器**：集成了全速USB Device/Host/OTG控制器，支持多种USB角色，增强了设备的互操作性和灵活性。 4. **CAN总线控制器**：提供两个CAN接口（CAN1和CAN2），遵循CAN2.0A/B标准，适合工业自动化和汽车电子应用，确保数据的可靠传输。 5. **串行通信接口**：包括SPI、SSP、IIC和IIS接口，这些接口可以连接各种传感器、控制器和其他外设，实现灵活的数据交换。 6. **外部存储器控制器（EMC）**：支持与外部SRAM、EPROM、闪存等存储设备的连接，扩大了存储容量，满足大容量数据存储需求。 7. **封装选项**：提供不同封装形式，如LPC1778FBD208、LPC1778FET208等，适应不同空间和散热要求的设计。 8. **应用领域**：特别适合于工业控制和医疗系统，这得益于其强大的处理能力、丰富的外设和高可靠性。 9. **软件兼容性**：手册更新了多个寄存器名称和描述，以与LPC177x/8x软件保持一致，确保了软件开发的兼容性和一致性。该用户手册详细介绍了LPC1778的硬件特性、接口操作、编程指南、应用示例等内容，是开发人员进行产品设计和系统集成的重要参考资料。通过深入理解这份手册，开发者能够充分利用LPC1778的潜力，创建高效、可靠的嵌入式解决方案。

User manual Rev. 2 — 17 September 2012 16 of 1109

NXP Semiconductors

UM10470

Chapter 2: LPC178x/7x Memory map

Fig 3. LPC1788 system memory map

31-24

22-19

0x4008 0000

0x4006 0000

0x4005 C000

0x4004 C000

0x4004 8000

0x4004 4000

0x4004 0000

0x4003 C000

0x4003 8000

0x4003 4000

0x4003 0000

0x4002 C000

0x4002 8000

0x4002 4000

0x4002 0000

0x4001 C000

0x4001 8000

0x4001 4000

0x4001 0000

0x4000 C000

0x4000 8000

0x4000 4000

0x4000 0000

reserved

I2C1

reserved

CAN 2

CAN 1

CAN common

CAN AF registers

CAN AF RAM

ADC

SSP1

pin connect

GPIO interrupts

RTC

reserved

I2C0

PWM1

PWM0

UART1

UART0

Timer1

Timer0

Watchdog timer

APB0 peripherals

0x200A 0000

0x2009 C000

0x2009 8000

0x2009 4000

0x2009 0000

0x2008 C000

0x2008 8000

0x2008 4000

0x2008 0000

EMC registers

GPIO

reserved

CRC engine

USB

LCD controller

Ethernet

GP DMA ctlr

AHB peripherals

I-Code and

D-Code

memory space

30-17

13-12

1-0

0x4010 0000

0x400F C000

0x400C 4000

0x400C 0000

0x400B C000

0x400B 8000

0x400B 0000

0x400A C000

0x400A 8000

0x400A 4000

0x400A 0000

0x4009 C000

0x4009 8000

0x4009 4000

0x4009 0000

0x4008 C000

0x4008 8000

0x4008 0000

system control

reserved

SD card

QEI

motor ctl PWM

reserved

SSP2

I2S

UART4

I2C2

UART3

UART2

Timer3

Timer2

DAC

SSP0

reserved

APB1 peripherals

0.5 GB

1 GB

2 GB

4 GB

active interrupt

vectors

0x0400

0x0000

reserved

private peripheral bus

external memory

(4 dynamic chip selects)

APB peripheral group 1

APB peripheral group 0

reserved

AHB peripherals

8 kB boot ROM

external memory

(4 static chip selects)

APB peripheral

bit-band addressing

SPIFI memory

mapped space

peripheral SRAM 1

peripheral SRAM 0

64 kB Main SRAM

512 kB flash memory

LPC178x/7x

memory space

0xFFFF FFFF

0xE010 0000

0xE004 0000

0xE000 0000

0xA000 0000

0x8000 0000

0x4400 0000

0x4200 0000

0x4010 0000

0x4008 0000

0x4000 0000

0x2900 0000

0x2800 0000

0x200C 0000

0x2000 4000

0x2000 0000

0x1FFF 0000

0x1001 0000

0x1000 0000

0x0008 0000

0x0000 0000

0x2400 0000

0x2200 0000

0x2008 0000

peripheral SRAM bit-band

addressing

120420

User manual Rev. 2 — 17 September 2012 17 of 1109

NXP Semiconductors

UM10470

Chapter 2: LPC178x/7x Memory map

2.3 On-chip peripherals

All peripheral register addresses are word aligned (to 32-bit boundaries) regardless of

their size. This eliminates the need for byte lane mapping hardware that would be required

to allow byte (8-bit) or half-word (16-bit) accesses to occur at smaller boundaries. An

implication of this is that word and half-word registers must be accessed all at once. For

example, it is not possible to read or write the upper byte of a word register separately.

2.3.1 AHB peripherals

The following table shows the addresses of peripheral functions that reside directly on the

AHB bus matrix. Complete register descriptions may be found in the relevant chapters.

2.3.2 APB peripheral addresses

The following table shows the address maps of the 2 APB buses. APB peripherals do not

use all of the 16 kB space allocated to them. Typically each device’s registers are

"aliased" or repeated at multiple locations within each 16 kB range.

Table 4. AHB peripherals and base addresses

AHB peripheral Address range Peripheral name

0 0x2008 0000 to 0x2008 3FFF General Purpose DMA controller

1 0x2008 4000 to 0x2008 7FFF Ethernet MAC

2 0x2008 8000 to 0x2008 BFFF LCD controller

3 0x2008 C000 to 0x2008 FFFF USB interface

4 0x2009 0000 to 0x2009 3FFF CRC engine

5 0x2009 4000 to 0x2009 7FFF reserved

6 0x2009 8000 to 0x2009 BFFF GPIO

7 0x2009 C000 to 0x2009 FFFF External Memory Controller

8 to 15 0x200A 0000 to 0x200B FFFF reserved

Table 5. APB0 peripherals and base addresses

APB0 peripheral Base address Peripheral name

0 0x4000 0000 Watchdog Timer

1 0x4000 4000 Timer 0

2 0x4000 8000 Timer 1

30x4000C000 UART0

4 0x4001 0000 UART1

5 0x4001 4000 PWM0

6 0x4001 8000 PWM1

70x4001C000 I

8 0x4002 0000 reserved

9 0x4002 4000 RTC and Event Monitor/Recorder

10 0x4002 8000 GPIO interrupts

11 0x4002 C000 Pin Connect Block

12 0x4003 0000 SSP1

13 0x4003 4000 ADC

剩余1108页未读，继续阅读

qq_42995475

粉丝: 0
资源: 2

NXP LPC1778 微控制器用户手册：工业与医疗系统应用

LPC1752中文手册

LPC1788中文用户手册.zip

lpc1788用户手册（中文带书签目录）

UM10360-LPC17xx User Manual(中文版)

NXP公司LPC32x0系列user manual(用户设计手册)

MYD-LPC435x-185x用户手册v1.0.pdf

LPC178x7x User manual

user_manual_lpc214x_lpc2148_usermanual_

NXP_LPC55S6x 32-bit Arm Cortex:registered:-M33-综合文档

LPC1787 user manual

最新资源