ITU-T G.8260修正2：包传输的同步、质量和可用性目标

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"ITU-T G.8260-201811-I!Amd2!PDF-E.pdf 是一个关于在传输系统和媒体、数字系统及网络中的包传输方面同步、质量和可用性目标的国际电信联盟标准。该文档特别关注了在包网络中的同步定义和术语，并对1588v2协议进行了讨论。" 这篇文档是国际电信联盟（ITU-T）G系列标准的一部分，主要探讨在基于包的传输系统中如何实现同步、确保服务质量（QoS）和系统的可用性。1588v2，也称为精确时间协议（Precision Time Protocol, 第二版），是这个文档的一个关键标签，它是一个用于网络设备间进行高精度时间同步的标准。 G.8260的第二修正案可能详细阐述了1588v2协议的改进和增强，包括但不限于： 1. **同步机制**：1588v2通过交换时间戳信息来实现网络中的设备同步，确保数据包在网络中传输时的时间准确性。修正案可能详细解释了这些机制的工作原理和优化方法。 2. **服务质量与可用性**：文档可能探讨了如何在多路复用和动态分配带宽的环境中保证时间敏感流量的优先级，以及如何设计网络架构以达到预期的同步质量和服务水平协议（SLAs）。 3. **网络拓扑与性能**：对于复杂的网络环境，1588v2的适应性和扩展性是关键。修正案可能包含了关于如何在不同网络结构中部署1588v2，以及如何处理延迟、抖动和丢包对同步性能的影响的内容。 4. **错误管理和恢复策略**：在面临网络故障或异常情况时，同步协议需要有有效的恢复机制。修正案可能详细介绍了这些机制以及如何确保系统在各种条件下的稳定性。 5. **互操作性和兼容性**：标准可能强调了1588v2与其他网络协议的协同工作，以及如何确保不同制造商的设备之间的一致性。 6. **测试与评估**：文档可能包含了一系列测试和验证同步性能的方法，以确保网络设备符合G.8260设定的目标。 G系列标准涵盖了从模拟到数字，从有线到无线的各种通信系统，G.8260作为其中的一员，对理解和支持现代网络基础设施的同步需求至关重要，特别是对于那些需要高精度时间同步的应用，如电力系统自动化、金融交易、广播和通信网络等。

4 Rec. ITU-T G.8260 (2015)/Amd.2 (11/2018)

NOTE – In the case of a periodic packet timing signal (used for one-way frequency distribution), the event

packets enter the network from the packet master clock at regular intervals, such that the master's timing

information is implied from the nominal frequency of the packets.

3.1.12 packet network timing function (PNT-F): The set of functions within the inter-working

function (IWF) that supports the synchronization network clock domain (see Figure B.2 of

[ITU-T G.8261]). This includes the function to recover and distribute the timing carried by the

synchronization network. The PNT-F clocks may be part of the IWF or may be part of any other

network element in the packet network.

When the PNT-Fs are part of the IWF, they may support the CES IWF or change the layer over

which timing is carried (i.e., from packet to physical layer and vice versa).

3.1.13 packet slave clock: A clock whose timing output is frequency locked or phase aligned or

time aligned to one or more reference packet timing signals exchanged with a higher quality clock.

3.1.14 packet timing monitor: A device capable of analysing the packet flow [e.g., precision time

protocol (PTP)] including precise measurement of the sending times and arrival times of timing

event messages utilizing an accurate, stable clock. A tapped monitor does not substantively impact

the transmission of packets between the communicating clocks; an in-line monitor introduces a

fixed, symmetric, delay for packets in the two directions of transmission and thereby does not

substantively impact the transfer of timing between the communicating clocks.

3.1.15 packet timing signal: A signal, consisting of a series of event packets or frames, that is

used to convey timing information from a packet master clock to a packet slave clock.

Event packets in a packet timing signal may travel from a packet master clock to a packet slave

clock or vice versa, but the flow of timing information is always in the direction from master to

slave.

The significant instants of the packet timing signal are measured relative to the master's local time

scale as they pass the master's timing reference point, and these measurements are communicated to

the packet slave clock.

The significant instants of the packet timing signal are also measured relative to the slave's local

time scale as they pass the slave's timing reference point.

NOTE 1 – The significant instants of the signal are the set of times that a defined location in each event

packet or frame passes a given reference point in the network (e.g., the interface between the packet master

clock and the network). Conventionally the defined location is the end of the start-of-frame delimiter, but it

may be defined differently in any given packet timing protocol provided the definition is consistent.

NOTE 2 – In the case of a periodic packet timing signal, the master's timing information is implied from the

nominal frequency of the packets.

3.1.16 phase synchronization: This term implies that all associated nodes have access to

reference timing signals whose significant events occur at the same instant (within the relevant

phase accuracy requirement). In other words, the term refers to the process of aligning clocks with

respect to phase (phase alignment). This is shown in Figure 2.

NOTE 1 – Phase synchronization includes compensation for delay between the (common) source and the

associated nodes.

NOTE 2 – This term might also include the notion of frame timing (i.e., the point in time when the timeslot

of an outgoing frame is to be generated).

NOTE 3 – The concept of phase synchronization (phase alignment) should not be confused with the concept

of phase locking, where a fixed phase offset is allowed to be arbitrary and unknown. Phase alignment implies

that this phase offset is nominally zero. Two signals which are phase locked are implicitly frequency

synchronized. Phase alignment and phase lock both imply that the time error between any pair of associated

nodes is bounded.

6 Rec. ITU-T G.8260 (2015)/Amd.2 (11/2018)

Figure 3 – Time synchronization

3.1.20 time error: The difference between the time of a clock and the time indicated by the time

standard. A model for expressing the time error of a clock is described in clause I.3 of [ITU-T

G.810].

• constant time error: With reference to the time error model provided in clause I.3 of

[ITU-T G.810], the constant time error (cTE) of a synchronized clock is the term x

• constant time error estimate: Given a time error sequence {x(n); n = 0, 1 … (N – 1)}, an

estimate of the constant time error is the average of the first M samples of the time error

sequence. M is obtained from the observation interval providing the minimum value for

TDEV as computed for the given time error sequence. If a frequency offset is present, then

a linear regression method in accordance with Appendix II of [ITU-T G.823] can be

applied. Considerations for measurement data containing transients is for further study.

NOTE – In some cases ,due to the frequency components of the noise of the signal being measured,

it might be difficult to identify a stable, consistent observation interval. These cases must be

addressed case by case.

• dynamic time error: With reference to the time error model provided in clause I.3 of

[ITU-T G.810], the dynamic time error (dTE) of a synchronized clock is the random noise

component, i.e.,

   

nom

ref

2

 tt

The shape of the dTE component may be expressed using the time interval error function

TIE(t, τ), and characterized using the related metrics, maximum time interval error (MTIE)

and time deviation (TDEV), although the offset from zero of the TIE function may vary

depending on the time t when the measurement starts.

• maximum absolute time error The (max|TE|): maximum absolute value of the time error

function of a synchronized clock.

3.1.21 message timestamp point: See definition in [IEEE 1588], clause 3.1.18.

3.1.22 reference plane: The boundary between a port of a PTP clock and the network physical

medium. Timestamp events occur as messages cross this interface.

3.1.23 timestamp measurement plane: The plane at which timestamps are captured. If the

timestamp measurement plane is different from the reference plane, the timestamp is corrected for

ingress latency and/or egress latency.

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