设计勇士的FPGA指南： FPGA入门经典

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"Design.warriors.guide.to.FPGA 是一本国外的经典FPGA设计教材，适合FPGA初学者阅读。本书由Clive“Max”Maxfield撰写，由Newnes（Elsevier的印记）出版，版权归属于Mentor Graphics Corporation和Xilinx, Inc.。" 在FPGA（Field-Programmable Gate Array，现场可编程门阵列）的设计领域，《Design Warrior’s Guide to FPGAs》提供了深入浅出的指导。这本书涵盖了FPGA的基础知识、设计流程、以及在电子工程中的应用。作为FPGA入门必读，它旨在帮助读者理解这一复杂但至关重要的技术。书中可能包含以下几个关键知识点： 1. **FPGA基本概念**：解释了FPGA的结构和工作原理，包括可编程逻辑块（CLBs）、输入/输出块（IOBs）、查找表（LUTs）等基本组件，以及它们如何协同工作以实现定制的数字电路设计。 2. **设计流程**：详细介绍了从概念设计到实现的全过程，包括硬件描述语言（如VHDL或Verilog）的使用、逻辑综合、时序分析、布线等步骤。 3. **开发工具**：可能会讲解如何使用常见的FPGA开发工具，例如Xilinx的Vivado或Mentor Graphics的ModelSim，以及如何进行仿真和调试。 4. **IP核与复用**：讨论了如何使用和创建可重用的知识产权核（IP核），这是现代FPGA设计中的重要部分。 5. **功耗与散热管理**：探讨了在FPGA设计中考虑功耗优化和热管理的重要性，这对于高速、高性能系统至关重要。 6. **嵌入式系统**：可能会涵盖FPGA在嵌入式系统中的应用，包括软核处理器（如MicroBlaze或Nios II）的集成和系统级设计。 7. **测试与验证**：介绍如何进行有效的测试计划和验证策略，确保FPGA设计的正确性和可靠性。 8. **行业标准与规范**：可能涉及相关的接口标准，如PCIe、Ethernet、SPI、I2C等，以及如何在FPGA设计中实现这些接口。 9. **实例研究**：通过具体的案例研究，让读者了解如何将理论知识应用于实际设计项目。 10. **版权与许可**：强调了电子资源的版权保护，提示读者遵循合法的复制和分发规定，避免法律风险。这本书不仅提供理论知识，还注重实践操作，是FPGA新手学习和进阶的理想资源。通过学习，读者能够掌握FPGA设计的基本技能，并为后续的高级设计打下坚实基础。

I would also like to mention the fact that the folks at 0-In,

AccelChip, Actel, Aldec, Altera, Altium, Axis, Cadence,

Carbon, Celoxica, Elanix, InTime, Magma, picoChip, Quick-

Logic, QuickSilver, Synopsys, Synplicity, The MathWorks,

Hier Design, and Verisity were extremely helpful.

It also

behooves me to mention that Tom Hawkins from Launchbird

Design Systems went above and beyond the call of duty in

giving me his sagacious observations into open-source design

tools. Similarly, Dr. Eric Bogatin at GigaTest Labs was kind

enough to share his insights into signal integrity effects at the

circuit board level.

Last, but certainly not least, thanks go once again to my

publisher—Carol Lewis at Elsevier Science—for allowing me

to abstract the contents of appendix B from my book Designus

Maximus Unleashed (ISBN 0-7506-9089-5) and also for allow-

ing me to abstract the contents of appendix C from my book

Bebop to the Boolean Boogie (An Unconventional Guide to Elec-

tronics), Second Edition (ISBN 0-7506-7543-8).

xvi ■ The Design Warrior's Guide to FPGAs

1. If I’ve forgotten anyone, I’m really sorry (let me know, and I’ll add you

into the book for the next production run).

mable logic devices (PLDs), application-specific integrated circuits

(ASICs), application-specific standard parts (ASSPs), and—of

course—FPGAs.

For the purposes of this portion of our discussion, we shall

consider the term PLD to encompass both simple programmable

logic devices (SPLDs) and complex programmable logic devices

(CPLDs).

Various aspects of PLDs, ASICs, and ASSPs will be intro-

duced in more detail in chapters 2 and 3. For the nonce, we

need only be aware that PLDs are devices whose internal

architecture is predetermined by the manufacturer, but which

are created in such a way that they can be configured (pro-

grammed) by engineers in the field to perform a variety of

different functions. In comparison to an FPGA, however,

these devices contain a relatively limited number of logic

gates, and the functions they can be used to implement are

much smaller and simpler.

At the other end of the spectrum are ASICs and ASSPs,

which can contain hundreds of millions of logic gates and can

be used to create incredibly large and complex functions.

ASICs and ASSPs are based on the same design processes and

manufacturing technologies. Both are custom-designed to

address a specific application, the only difference being that

an ASIC is designed and built to order for use by a specific

company, while an ASSP is marketed to multiple customers.

(When we use the term ASIC henceforth, it may be assumed

that we are also referring to ASSPs unless otherwise noted or

where such interpretation is inconsistent with the context.)

Although ASICs offer the ultimate in size (number of

transistors), complexity, and performance; designing and

building one is an extremely time-consuming and expensive

process, with the added disadvantage that the final design is

“frozen in silicon” and cannot be modified without creating a

new version of the device.

Thus, FPGAs occupy a middle ground between PLDs and

ASICs because their functionality can be customized in the

2 ■ The Design Warrior's Guide to FPGAs

PLD is pronounced by

spelling it out as “P-L-D.”

SPLD is pronounced

by spelling it out as

“S-P-L-D.”

CPLD is pronounced

by spelling it out as

“C-P-L-D.”

ASIC is pronounced

“A-SIC.” That is, by spell-

ing out the “A” to rhyme

with “hay,” followed by

“SIC” to rhyme with “tick.”

ASSP is pronounced

by spelling it out as

“A-S-S-P.”

field like PLDs, but they can contain millions of logic gates

and be used to implement extremely large and complex func-

tions that previously could be realized only using ASICs.

The cost of an FPGA design is much lower than that of an

ASIC (although the ensuing ASIC components are much

cheaper in large production runs). At the same time, imple-

menting design changes is much easier in FPGAs, and the

time-to-market for such designs is much faster. Thus, FPGAs

make a lot of small, innovative design companies viable

because—in addition to their use by large system design

houses—FPGAs facilitate “Fred-in-the-shed”–type operations.

This means they allow individual engineers or small groups of

engineers to realize their hardware and software concepts on

an FPGA-based test platform without having to incur the

enormous nonrecurring engineering (NRE) costs or purchase the

expensive toolsets associated with ASIC designs. Hence, there

were estimated to be only 1,500 to 4,000 ASIC design starts

and 5,000 ASSP design starts in 2003 (these numbers are fal-

ling dramatically year by year), as opposed to an educated

“guesstimate” of around 450,000 FPGA design starts

in the

same year.

Introduction ■ 3

NRE is pronounced by

spelling it out as “N-R-E.”

The concept of what actually comprises a “logic gate” becomes a little

murky in the context of FPGAs. This topic will be investigated in

excruciating detail in chapter 4.

This number is pretty vague because it depends on whom you talk to (not

surprisingly, FPGA vendors tend to proclaim the lowest possible estimate,

while other sources range all over the place).

Another reason these numbers are a little hard to pin down is that it’s

difficult to get everyone to agree what a “design start” actually is. In the

case of an ASIC, for example, should we include designs that are canceled

in the middle, or should we only consider designs that make it all the way

to tape-out? Things become even fluffier when it comes to FPGAs due to

their reconfigurability. Perhaps more telling is the fact that, after pointing

me toward an FPGA-centric industry analyst’s Web site, a representative

from one FPGA vendor added, “But the values given there aren’t very

accurate.” When I asked why, he replied with a sly grin, “Mainly because

we don’t provide him with very good data!”

What can FPGAs be used for?

When they first arrived on the scene in the mid-1980s,

FPGAs were largely used to implement glue logic,

medium-

complexity state machines, and relatively limited data proc-

essing tasks. During the early 1990s, as the size and

sophistication of FPGAs started to increase, their big markets

at that time were in the telecommunications and networking

arenas, both of which involved processing large blocks of data

and pushing that data around. Later, toward the end of the

1990s, the use of FPGAs in consumer, automotive, and indus-

trial applications underwent a humongous growth spurt.

FPGAs are often used to prototype ASIC designs or to

provide a hardware platform on which to verify the physical

implementation of new algorithms. However, their low devel-

opment cost and short time-to-market mean that they are

increasingly finding their way into final products (some of the

major FPGA vendors actually have devices that they specifi-

cally market as competing directly against ASICs).

By the early-2000s, high-performance FPGAs containing

millions of gates had become available. Some of these devices

feature embedded microprocessor cores, high-speed input/out-

put (I/O) interfaces, and the like. The end result is that

today’s FPGAs can be used to implement just about anything,

including communications devices and software-defined

radios; radar, image, and other digital signal processing (DSP)

applications; all the way up to system-on-chip (SoC)

compo-

nents that contain both hardware and software elements.

4 ■ The Design Warrior's Guide to FPGAs

I/O is pronounced

by spelling it out as “I-O.”

SoC is pronounced by

spelling it out as “S-O-C.”

The term glue logic refers to the relatively small amounts of simple logic

that are used to connect (“glue”)—and interface between—larger logical

blocks, functions, or devices.

Although the term system-on-chip (SoC) would tend to imply an entire

electronic system on a single device, the current reality is that you

invariably require additional components. Thus, more accurate

appellations might be subsystem-on-chip (SSoC) or part of a system-on-chip

(PoaSoC).

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