Introduction
A1-2 Copyright © 2006 ARM Limited. All rights reserved. ARM DDI 0405A-01
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A1.1 The ARM Architecture – M profile
The ARM architecture has evolved through several major revisions to a point where it supports
implementations across a wide spectrum of performance points, with over a billion parts per annum being
produced. The latest version (ARMv7) has seen the diversity formally recognised in a set of architecture
profiles, the profiles used to tailor the architecture to different market requirements. A key factor is that the
application level is consistent across all profiles, and the bulk of the variation is at the system level.
The introduction of Thumb-2 in ARMv6T2 provided a balance to the ARM and Thumb instruction sets, and
the opportunity for the ARM architecture to be extended into new markets, in particular the microcontroller
marketplace. To take maximum advantage of this opportunity a Thumb-only profile with a new
programmer’s model (a system level consideration) has been introduced as a unique profile, complementing
ARM’s strengths in the high performance and real-time embedded markets.
Key criteria for ARMv7-M implementations are as follows:
• Enable implementations with industry leading power, performance and area constraints
— Opportunities for simple pipeline designs offering leading edge system performance levels in
a broad range of markets and applications
• Highly deterministic operation
— Single/low cycle execution
— Minimal interrupt latency (short pipelines)
— Cacheless operation
• Excellent C/C++ target – aligns with ARM’s programming standards in this area
— Exception handlers are standard C/C++ functions, entered using standard calling conventions
• Designed for deeply embedded systems
— Low pincount devices
— Enable new entry level opportunities for the ARM architecture
• Debug and software profiling support for event driven systems
This manual is specific to the ARMv7-M profile.
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