92 IEEE GEOSCIENCE AND REMOTE SENSING LETTERS, VOL. 6, NO. 1, JANUARY 2009
Implementation of SDR Digital Beamformer
for Microsatellite SAR
Jeich Mar, Senior Member, IEEE, and You-Rong Lin
Abstract—The hardware reconfiguration feature of a software-
defined radio (SDR) architecture can support multiple modes of a
digital beamformer (DBF) striving for compactness and efficient
processing power, which are important issues for microsatellite
synthetic aperture radar (SAR) systems. In this letter, based on
the SDR architecture, a DBF system, consisting of multiple beam,
direction-of-arrival (DOA) estimation, and null-steering operation
modes, is realized using a field-programmable gate array (FPGA)
processor. Since the hardware reconfiguration has to be processed
with minimal delay, the FPGA hardware must be of modularized
design. Different modes can share the common module during
mode switching. Experimental results verify the performance of
DOA, null steering, and mode switching. The processing time
of each DBF mode is less than the cross-range pulse repetition
interval of the microsatellite SAR system.
Index Terms—Digital beamformer (DBF), microsatellite,
software-defined radio (SDR), synthetic aperture radar (SAR).
I. INTRODUCTION
O
N BISTATIC or multistatic spaceborne radar, the appro-
priate digital beamformer (DBF) algorithms can obtain
multiangular synthetic aperture radar (SAR) data and enhance
the signal-to-noise ratio [1], [2]. Such a simultaneous obser-
vation of a wide area with fine resolution provides useful
information, particularly for the dynamic target surveillance of
oceans, Earth’s surface, Arctic sea ice, and artificial moving
targets. Some applications ask for short revisit time to ensure
seamless coverage to obtain wide-swath SAR image data with
a single satellite using digital beamforming on the receiver
[3], in which the received signals of each antenna element
are separately amplified, down converted, and digitized. This
enables a combination of the recorded antenna element signals
to form multiple beams with adaptive shapes. The transmitter
and receiver antennas of the bistatic SAR for the microsatellite
can be mounted on a single carrier or placed on separate
platforms [4]. Since the cross-track errors [5] of the distributed
microsatellite constellation and satellite fading channel errors
will result in phase difference among received signals of each
array antenna element, the proposed software-defined radio
(SDR) DBF is designed with the configuration of two antennas
on the same microsatellite. For the purpose of simplifying the
phase compensation among the received signals from the array
antenna elements and reducing the downlink transmission load,
Manuscript received June 5, 2008; revised August 13, 2008 and
October 2, 2008. First published December 9, 2008; current version published
January 14, 2009.
The authors are with the Department of Communications Engineering,
Yuan-Ze University, Chung-Li 32003, Taiwan (e-mail: eejmar@saturn.yzu.
edu.tw).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LGRS.2008.2008315
the SDR DBF is realized on the microsatellite. The proposed
SDR DBF can be applied to the other DBF configurations
without changing the hardware.
For microsatellite SAR systems [6], power consumption is
an important issue. The reconfigurable feature of the SDR ar-
chitecture gives rise to reusability of hardware, scalability, and
power efficiency. Reusability of hardware supporting multiple
modes of DBF strives for compactness and efficient power
consumption. A number of papers describe various SDR archi-
tectures and design considerations [7], [8]. In this letter, an SDR
DBF system, which is comprised of multiple beam, direction-
of-arrival (DOA) estimation, and null-steering operation modes
[9]–[11], is realized using a field-programmable gate array
(FPGA) for the microsatellite SAR system. In multiple-beam
mode, the beam steering function is performed with high res-
olution. In DOA estimation mode, the direction of the unde-
sired interference signal is estimated using the SAR receiver
processing. In null-steering mode, the receiver end on SAR
can resist the interference to improve its antijamming capability
[7], [8]. The mode can be chosen with software for achieving
reconfiguration ability and download ability according to the
variety of operation requirements.
The multimode DBF processing modules including 4-fast
Fourier transform (FFT) multibeamforming module, ampli-
tude comparison DOA module, and null-steering beamform-
ing module are designed and implemented on the FPGA
processor. Ten short quadrature phase shift keying modulated
(QPSK-modulated) orthogonal frequency division multiplexing
(OFDM) symbol signals are employed to test the functions of
mode switching and null-steering beamforming of SDR DBF.
II. S
TRUCTURE OF SDR DBF
Fig. 1 shows the block diagram of SDR DBF, which consists
of an interface processing unit (IPU), a processing module
unit (PMU), and a reconfiguration controller (RC). The host
personal computer is used as the RC for the proposed multi-
mode SDR DBF. The RC is utilized for controlling the recon-
figuration processing of SDR DBF by sending mode request
command and reconfiguration command through the IPU. The
application program codes residing on the memory of the RC
for the multimode beamforming process are sent to the PMU,
which is realized on the FPGA, via the IPU. The I PU employs
the application program code to command the modules of
the PMU through a Peripheral Component Interconnect (PCI)
interface. The IPU will convert the generic application program
code into specific PMU commands to execute the beamforming
function on the processing modules. The application program
code consists of the high-level design tool, such as MATLAB
or the PMU driver, and the functionality code modules. The
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