Section number Title Page
23.4.2 Channel initialization and startup................................................................................................................372
23.4.3 Dual-Address Data Transfer Mode..............................................................................................................374
23.4.4 Advanced Data Transfer Controls: Auto-Alignment...................................................................................375
23.4.5 Termination..................................................................................................................................................376
Chapter 24
Multipurpose Clock Generator (MCG)
24.1 Introduction...................................................................................................................................................................377
24.1.1 Features........................................................................................................................................................377
24.1.2 Modes of Operation.....................................................................................................................................379
24.2 External Signal Description..........................................................................................................................................379
24.3 Memory Map/Register Definition.................................................................................................................................380
24.3.1 MCG Control 1 Register (MCG_C1)...........................................................................................................380
24.3.2 MCG Control 2 Register (MCG_C2)...........................................................................................................382
24.3.3 MCG Control 3 Register (MCG_C3)...........................................................................................................383
24.3.4 MCG Control 4 Register (MCG_C4)...........................................................................................................384
24.3.5 MCG Control 5 Register (MCG_C5)...........................................................................................................385
24.3.6 MCG Control 6 Register (MCG_C6)...........................................................................................................386
24.3.7 MCG Status Register (MCG_S)..................................................................................................................388
24.3.8 MCG Status and Control Register (MCG_SC)............................................................................................389
24.3.9 MCG Auto Trim Compare Value High Register (MCG_ATCVH)............................................................391
24.3.10 MCG Auto Trim Compare Value Low Register (MCG_ATCVL)..............................................................391
24.3.11 MCG Control 7 Register (MCG_C7)...........................................................................................................391
24.3.12 MCG Control 8 Register (MCG_C8)...........................................................................................................392
24.3.13 MCG Control 9 Register (MCG_C9)...........................................................................................................393
24.3.14 MCG Control 10 Register (MCG_C10).......................................................................................................393
24.4 Functional description...................................................................................................................................................393
24.4.1 MCG mode state diagram............................................................................................................................393
24.4.2 Low-power bit usage....................................................................................................................................398
KL16 Sub-Family Reference Manual, Rev. 3.2, October 2013
Freescale Semiconductor, Inc. 15