MIT Verilog电子琴设计：Wumpus Sampling Synthesizer

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"这篇PDF文档是关于在FPGA上实现一个采样合成电子琴的设计，由Damon Vander Lind和Mark Tobenkin于2007年在麻省理工学院完成的一项课程作业。这个项目名为‘Wumpus’，它允许用户录制、编辑并以不同的播放速率回放采样，根据击打的不同电子琴键改变回放频率。通过连接的MIDI键盘，用户可以以更快或更慢的速度播放样本（即改变音调），并应用回声效果。最多可同时播放8个‘音符’，即频率偏移的样本。开发工作使用Verilog语言，在Xilinx Virtex II FPGA上进行，该FPGA配置在专为MIT入门数字设计课程设计的原型板上。" 在"电子琴verilog设计.pdf"中，关键知识点包括： 1. **Verilog**: Verilog是一种硬件描述语言（HDL），用于设计和建模数字系统，包括FPGA和ASIC。在这个项目中，Verilog被用来编写控制和实现Wumpus电子琴逻辑的代码。 2. **FPGA（Field-Programmable Gate Array）**: FPGA是一种可编程的集成电路，可以在现场进行编程，以适应各种不同的数字逻辑功能。Xilinx Virtex II是一款常见的FPGA，它提供了足够的资源来实现复杂的电子琴设计。 3. **Wumpus电子琴**: Wumpus是一种采样合成器，用户可以录制声音样本，然后根据所按的琴键调整播放速度，从而改变音高。这个名字来源于开发过程中的测试用词。 4. **MIDI键盘**: MIDI（Musical Instrument Digital Interface）键盘是一种输入设备，可以将演奏的音符转化为数字信号，与电子琴连接后，能够控制样本的播放速度和频率，实现变速和变调。 5. **采样和回放**: 用户可以记录声音样本，并对其进行编辑，包括设置开始、结束和保持位置。样本可以以不同速率回放，根据击打的琴键调整频率，实现音高的变化。 6. **多音符播放**: Wumpus支持同时播放多达8个音符，这意味着可以实现和弦演奏。每个音符可以是频率偏移的样本，增加了音色的多样性。 7. **数字信号处理**: 设计中可能涉及到的数字信号处理技术，如频率转换和回声效果的实现，这些都是通过Verilog程序在FPGA上实现的。这个项目展示了如何将高级概念如音乐合成、采样和数字信号处理集成到硬件设计中，为学习者提供了一个实用的平台，用于理解和实践数字系统设计。同时，它也强调了Verilog作为硬件描述语言在现代电子设计中的应用。

Table 1: Boundary Conditions for Parameters

Value Upper Lower

sample start sample end 0x0

sample

end 0x1FFFF sample start

window hold pos sample end-window hold length sample start

window

hold length 0xFFF 0x200

pitch offset 0x3C 0x0

echo time 0xFFF 0x0

Table 2: Values Loaded Into Parameters after Record

Bus Value

sample start 0x0

sample

end sample length

window hold pos sample start

window hold length 0x200

pitch

offset 0x18

echo time 0xFFF

2.3.4 Record Logic

When a record event occurs, control module contains logic for setting new values in the parameters. An

instance of the level

to pulse module creates a pulse on the falling edge of the record signal. This trig-

gers new values to load into sample start, sample end, pitch offset, echo time,window hold pos, and win-

dow

hold length. The buses sample start q, sample end q, pitch offset q, echo time q,window hold pos q,

and window hold length q are set to the default values, which are documented in Table 2. The record

logic pulls the sample start ld, sample end ld, pitch offset ld, echo time ld,window hold pos ld, and

window

hold length ld lines high for two clock cycles. This delay allow for parameters whose boundaries

rely on other parameters to settle to legal values.

2.3.5 Serial FSM/Sequencer

The serial

fsm module outputs bytes from an asyncronous serial input. The module expects a single

start bit value of zero, followed by 8 bits and a stop bit. The baud rate of the incoming signal should

be set in the parameter BAUD

RATE, and its width in bits in BAUD RATE SIZEOF. The clock rate of

the system must also be set in parameters CLOCK

RATE and CLOCK RATE SIZEOF. These values are

used to calculate delays in between reading bits from the input line rx. When the FSM/Sequencer has

completed reading a byte, the ready pulse line pulls high for a single clock cycle. The byte bus contains

the new byte.

2.3.6 Delay

The delay module provides a single clock cycle pulse after one of two numbers of clock cycles. The pulse

wire provides the output pulse after either parameter DELAY1

COUNT or parameter DELAY2 COUNT

number of clock cycles. If the short signal is high, DELAY1

COUNT is used, else DELAY2 COUNT

is used. The pulse occurs only once, and the module must be reset to create another pulse. The param-

eter COUNT SIZEOF must specify the greater of the two bit widths between DELAY1 COUNT and

DELAY2

COUNT.

2.3.7 MIDI FSM

The midi

fsm module interprets incoming MIDI messages for Note On/Off events, and outputs the pitch

and velocity and pressed/depressed status of those events. The FSM receives bytes from the MIDI inter-

face serially via the byte line. When a new byte is ready the new

byte line should be driven high for a

single clock cycle. The FSM will ignore all MIDI events other than those which begin with the Note On

(0x9) or Note Off (0x8) nibble. The pitch and velocity bytes for these events follow from the serial line.

The pitch byte indicates which key on the keyboard was pressed, middle C being key 0x3C. The velocity

byte indicates how hard the key was pressed, with a “normal” key press being placed at 0x40. There are

other MIDI events which consist of multi byte frames similar to this. The MIDI FSM correctly ignores

the data bytes of unsupported MIDI events. The MIDI module also generates a pressed signal. A Note

Off event or Note On event with velocity zero will drive this line low, the line is driven high by a Note On

event with non-zero velocity. When a midi event has been processed, the FSM generates a single clock

cycle pulse on ready.

2.4 Note Control

The note control module manages note pressed and released events going to the Notes module for both the

keyboard playback and loop modes. The module exports the period, velocity and pressed status of a note

identiﬁed by the note

select bus to the notes module. The module drives the note ready line high when

the data is to be written. The ﬁnished note select line allows the notes module to identify a note, and then

indicate its availability to play new requests with a high or low signal on the ﬁnished line. Note control

contains a FIFO for handling incoming MIDI keyboard events. The FIFO is a Xilinx IP Core Syncronous

FIFO with a width of 17 (pitch,velocity and pressed) and a depth of 32. The note

control fsm handles

this FIFO to generate a keyboard

pitch, keyboard velocity, keyboard pressed and keyboard ready signal

for MIDI events. A small BRAM is used to provide a lookup table between the MIDI keyboard values

and the periods which notes expects. The keyboard

pitch combined with the pitch offset input is an index

into this rom, generating keyboard period. This FSM is also passed the ﬁnished note select and ﬁnished

wires to keep track of which notes are free. The FSM uses this information to correctly select notes

with the keyboard

note select and keyboard note select signals. A loop control fsm exists to control the

outputs when in loop mode. The module generates a parallel set of control signals, named loop pressed,

loop note select and loop note ready. The loop period and loop velocity are ﬁxed at “Middle C” and the

“normal” velocity for MIDI of 0x40. The output of the note

control fsm and the loop control fsm are

multiplexed by the input signal loop.

2.4.1 Note Control FSM

The note

control fsm creates appropriate control signals destined for notes based on events arriving at

an external queue. When the external queue indicates it is no longer empty by pulling the queue

empty

line low, the FSM/Sequencer signals a pop by pulling queue pop high, then a clock cycle later latches

the output of the queue to the output lines period, velocity and pressed. If a key was just pressed, the

FSM enters a small sequencer to test if there are any notes available. The status of note availability

is being constantly updated into the ﬁnished

reg array. The input ﬁnished note select indexes into this

array, whose value is set to the input ﬁnished every clock cycle. The sequencer increments note

select

as another index into ﬁnished reg. If no ﬁnished notes are found, the FSM returns to testing for a non-

empty queue. If a note is found, the FSM stores the new period the note will be playing into the array

note

periods, then pulls note ready high. After this the FSM enters a sequencer to wait a conﬁgurable

number of new frame pulses before testing the queue again. If a key released event arrives, the FSM

follows an inverse process. The FSM enters a small sequencer to see if the period of the released key

matches any entry in note

period, which is also not ﬁnished in ﬁnished reg. If no note is found, the queue

returns to testing for non-empty queues. If a note is found, pressed is again set appropriately, ready pulled

high, and a sequencer is used to wait a certain number of new frame pulses. Upon returning to testing for

a non-empty queue, the FSM pulls ready low.

2.4.2 Loop Control FSM

The loop

control fsm generates a press and release signal in short succession, destined for the notes mod-

ule. The loop control fsm watches particularly for the note identiﬁed by ﬁnished note select equalling

zero (the zeroth note) to be ﬁnished. When ﬁnished is high, and ﬁnished

note select is zero, the loop control fsm

generates a pressed signal, waits for a new frame pulse and then pulls pressed low and ready high.

2.5 Visualizer

The visualizer module provides a 800x600, 60Hz stream of 3 bit values to pixel. The hcount and vcount

buses indicate the position of the pixel stream on the screen currently. The graphic displays a space on

the screen limited to 512 pixels wide and 128 pixels tall. The visualizer module combines a series of dif-

ferent pixel streams created by submodules to create its output. The submodules start

text, sustain text,

end text, echo text and tune text each generate an ASCII string using the provided char string display

module. The submodules start

bar, end bar, sustain position bar, sustain length bar, echo bar, and

tune bar each generate rectangles using the visualizer rectangle module. The waveform g element gen-

erates a waveform representation using the waveform

graphic module. The my waveform background

element generates a multicolor rectangle using the waveform background module. The keyboard element

generates the image of a keyboard using the keyboard bitmap module. Finally the pixel streams of all of

these modules are bitwise or’d together and output to pixel.

2.5.1 Visualizer Rectangle

The visualizer

rectangle generates a pixel stream for a rectangle of a parameterized COLOR, HEIGHT

and WIDTH, at a location speciﬁed by the busses x and y. The hcount and vcount buses indicate the

position of the pixel stream on the screen currently.

2.5.2 Keyboard Bitmap

The keyboard

bitmap module reads an image of a keyboard, stored in a BRAM, based on positions

encoded by hcount and vcount. The graphic displays a space on the screen limited to 512 pixels wide and

128 pixels tall. The memory is a single bit wide (black and white) BRAM with 56000 locations. This size

is the product of the HEIGHT and WIDTH parameters. The keyboard

bitmap module resets the address

into the memory when hcount and vcount arrive at the values in x and y. The keyboard bitmap outputs a

zero on the pixel bus whenever the the hcount and vcount indicate a point outside of the box designated

by x,y and the parameter HEIGHT and WIDTH. Elsewise, the module outputs the value of the memory

replicated three times on pixel, and increments the address.

2.5.3 Waveform Graphic

The waveform graphic module provides a pixel stream of a visualization of the sample which is recorded.

The hcount and vcount buses indicate the position of the pixel stream on the screen currently. The graphic

displays a space on the screen limited to 512 pixels wide and 128 pixels tall. However, it has to display

up to 98304 frames which are 16 bits wide. To accomplish this, the module has an FSM/sequencer for

averaging frames, and storing them in a small memory. When the record signal goes high, the FSM

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