SpyGlass Lint规则参考指南：P-2019.06-SP1

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"《eetop.cn_SpyGlass_LintRules_Reference.pdf》是一份由Synopsys公司发布的SpyGlass lint规则参考指南，版本为P-2019.06-SP1，发布日期为2019年9月。这份文档是Verification Continuum的一部分，包含了针对IC设计（Integrated Circuit）开发的重要工具和规则集。它强调了版权和专有信息保护，所有使用须遵守Synopsys的书面许可协议，任何未经授权的复制、修改或分发都是严格的禁止行为。该指南的目的在于帮助工程师们遵循严格的质量标准，通过SpyGlass进行代码审查和静态分析，以确保软件的正确性、效率和一致性。Lint规则旨在检测潜在的编程错误、代码风格问题和不符合最佳实践的代码片段，从而在编码阶段就发现并修复这些问题，节省后期调试的时间和成本。文档还提到了目的地控制声明，说明其中的技术数据受美国出口管制法律管辖，任何可能违反美国法律向其他国家披露的行为都被严禁。因此，阅读者需自行确认适用的法规并遵守。最后，文档中的免责声明明确指出，Synopsys及其许可方不对材料做出任何形式的担保，包括但不限于商品质量和服务适用于特定目的的默示保证。此外，文中还提及了Synopsys和其产品的商标信息。《SpyGlass_LintRules_Reference.pdf》是电子设计验证领域的重要参考资料，对于从事IC设计的开发人员来说，理解和遵循其中的lint规则对于保证代码质量、提高开发效率以及避免潜在法律风险具有重要意义。"

xvi

Synopsys, Inc.

Feedback

W491 : Reports case expression with a width greater than the specified

value............................................................................627

W561 : A zero-width-based number may be evaluated as 32-bit number...

629

W563 : Reduction of a single-bit expression is redundant ...................630

W575 : Logical NOT operating on a vector ........................................631

W576 : Logical operation on a vector...............................................632

MultipleDriver Rules ............................................................................ 633

W259 : Signal has multiple drivers .................................................634

W323 : Multiply driven inout net .....................................................636

W415 : Reports variable/signals that do not infer a tristate and have

multiple simultaneous drivers ..........................................637

W415a : Signal may be multiply assigned (beside initialization) in the same

scope ...........................................................................641

W552 : Different bits of a bus are driven in different sequential blocks .653

W553 : Different bits of a bus are driven in different combinational blocks .

655

Simulation Rules ................................................................................. 656

W122 : A signal is read inside a combinational always block but is not

included in the sensitivity list (Verilog)

A signal is read inside a combinational process but is not included

in the sensitivity list (VHDL) ............................................657

W167 : Module has no input or output ports .....................................666

W456 : A signal is included in the sensitivity list of a combinational always

block but not all of its bits are read in that block (Verilog)

A signal is included in the sensitivity list of a process but not all

of its bits are read in that block (VHDL) ............................667

W456a : A signal is included in the sensitivity list of a combinational always

block but none of its bits are read in that block (Verilog)

A signal is included in the sensitivity list of a combinational

process block but none of its bits are read in that block (VHDL).

671

W502 : Ensure that a variable in the sensitivity list is not modified inside the

always block .................................................................675

W526 : Use case statements rather than if/else, where feasible, if

performance is important ................................................ 678

Event Rules ......................................................................................... 681

W238 : Mixing combinational and sequential styles............................ 682

W245 : Probably intended "or", not "|" or "||" in sensitivity list ...........684

xvii

Synopsys, Inc.

Feedback

W253 : Data event has an edge...................................................... 686

W254 : Reference event does not have an edge................................ 687

W256 : A notifier must be a one-bit register ..................................... 688

W326 : Event variable appearing in a posedge/negedge expression ..... 689

W421 : Reports “always” or “process” constructs that do not have an event

control ......................................................................... 691

Loop Rules .......................................................................................... 694

W66 : Ensure that a repeat construct has a static control expression ... 695

W352 : Reports “for” constructs with condition expression.................. 698

W478 : This rule has been deprecated ............................................. 702

W479 : Checks if loop step statement variables are not properly

incremented or decremented........................................... 703

W480 : Ensure that the loop index is of integer type.......................... 705

W481a : Ensure that a for loop uses the same step variable as used in the

condition ...................................................................... 708

W481b : Ensure that a for loop uses the same initialization variable as used

in the condition ............................................................. 712

Lint_Elab_Rules .................................................................................. 715

W162 : Extension of bits in constant integer conversion ..................... 718

W163 : Truncation of bits in constant integer conversion.................... 720

W164a : Identifies assignments in which the LHS width is less than the RHS

width ........................................................................... 721

W164b : Identifies assignments in which the LHS width is greater than the

RHS width .................................................................... 745

W316 : Reports extension of extra bits in integer conversion .............. 764

W328 : Truncation in constant conversion, without loss of data........... 767

Verilint_Compat Rules......................................................................... 768

W313 : Converting integer to single bit............................................ 769

W348 : Unspecified width for integer expression in a concatenation ..... 770

Miscellaneous Rules ............................................................................ 772

W189 : Nested Synopsys translate_off comments ............................. 773

W192 : Empty block...................................................................... 775

W193 : Empty statement ............................................................... 776

W208 : Nested Synopsys translate_on comments ............................. 777

W350 : A control character appears inside a string ............................ 778

W351 : A control character appears inside a comment ....................... 779

W433 : More than one top-level design unit ..................................... 780

W527 : Dangling else in sequence of if conditions. Make sure nesting is

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