![](https://csdnimg.cn/release/download_crawler_static/87252008/bg10.jpg)
表 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER
BALL NAME SIGNAL NAME
MUX
MODE
TYPE DSIS
BALL
STATE
DURING
RESET
RX/TX/PULL
BALL
STATE
AFTER
RESET
RX/TX/PULL
MUX
MODE
AFTER
RESET
I/O
VOLTAGE
VALUE
POWER HYS
BUFFER
TYPE
PULL
UP/DOWN
TYPE
D3 DDR0_A4 DDR0_A4 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
F2 DDR0_A5 DDR0_A5 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
J2 DDR0_A6 DDR0_A6 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
L5 DDR0_A7 DDR0_A7 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
J3 DDR0_A8 DDR0_A8 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
J4 DDR0_A9 DDR0_A9 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
K3 DDR0_A10 DDR0_A10 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
J1 DDR0_A11 DDR0_A11 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
M5 DDR0_A12 DDR0_A12 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
K4 DDR0_A13 DDR0_A13 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
G4 DDR0_BA0 DDR0_BA0 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
G5 DDR0_BA1 DDR0_BA1 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
G2 DDR0_BG0 DDR0_BG0 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
H3 DDR0_BG1 DDR0_BG1 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
H5 DDR0_CAL0 DDR0_CAL0 A 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
F1 DDR0_CK0 DDR0_CK0 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
E1 DDR0_CK0_n DDR0_CK0_n O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
F4 DDR0_CKE0 DDR0_CKE0 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
F3 DDR0_CKE1 DDR0_CKE1 O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
E3 DDR0_CS0_n DDR0_CS0_n O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
E4 DDR0_CS1_n DDR0_CS1_n O 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
B2 DDR0_DM0 DDR0_DM0 IO 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
M2 DDR0_DM1 DDR0_DM1 IO 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
A3 DDR0_DQ0 DDR0_DQ0 IO 1.1 V/1.2 V VDDS_DDR, VDDS_DDR_C DDR
AM2434, AM2432, AM2431
ZHCSNU9B – APRIL 2021 – REVISED JULY 2021
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