安森美PYTHON5000/2000 CMOS图像传感器技术规格解析

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"安森美PYTHON5000/2000 CMOS图像传感器的规格和技术特点" 安森美PYTHON5000/2000 CMOS图像传感器是一款高性能的传感器，适用于嵌入式系统中的图像捕捉和处理。这款传感器提供两种分辨率选项：PYTHON5000具有2592x2048个活动像素，适用于1英寸光学格式；PYTHON2000则有1920x1200个活动像素，设计用于2/3英寸光学格式。其关键特性包括： 1. 数据输出选项：传感器支持多种数据输出模式，如P1-SN/SE/FN，提供了8路LVDS（低压差分信号）数据通道，而P3-SN/SE则提供4路LVDS数据通道。 2. 全局快门像素：采用4.8微米x4.8微米的低噪声全局快门像素设计，内置像素级电荷二极管减噪功能，提高了图像质量和信噪比。 3. 色彩选项：传感器可提供单色（SN）、彩色（SE）以及近红外（FN）三种版本，满足不同应用需求，例如在机器视觉、自动驾驶、安防监控等领域。 4. 高帧率：通过零行开销时间模式（Zero Row Overhead Time Mode），可以实现更高的帧率。例如，在全分辨率下，使用8路LVDS数据通道的P1-SN/SE/FN配置，PYTHON5000和PYTHON2000分别能达到100/85fps和230/180fps的帧率。 5. 内置10位模拟到数字转换器（ADC）：这使得传感器能以高精度进行信号转换，提供高质量的数字图像输出。 6. 高速串行输出：支持八路、四路、两路或一路LVDS高速串行输出，以适应不同的系统接口需求。 7. 可编程感兴趣区域（ROI）：用户可以根据应用场景自定义读出区域，提高数据处理效率。 8. 控制接口：采用串行外设接口（SPI）进行配置和控制，同时支持自动曝光控制（AEC）以适应不同光照条件。 9. 时钟锁相环（PLL）：通过PLL实现精确的时钟管理，确保数据采样的一致性和准确性。 10. 电源管理：支持双电源供电，3.3V和1.8V，符合低功耗设计要求，工作温度范围宽泛，从-40°C到+85°C，保证了在各种环境下的稳定工作。综上，安森美PYTHON5000/2000 CMOS图像传感器凭借其高分辨率、高帧率、多色彩选项和灵活的数据输出方式，成为嵌入式系统中高效、高质量图像处理的理想选择。

NOIP1SN5000A

www.onsemi.com

Non−Zero and Zero Row Overhead Time (ROT) Modes

In pipelined global shutter mode, the integration and

readout are done in parallel. Images are continuously read

out and integration of frame N is ongoing during readout of

the previous frame N−1. The readout of every frame starts

with a Frame Overhead Time (FOT), during which the

analog value of the pixel diode is transferred to the pixel

memory element. After the FOT, the sensor is read out line

by line and the readout of each line is preceded by a Row

Overhead Time (ROT) as shown in Figure 13.

In Reduced/Zero ROT operation mode (refer to

Figure 14), the row blanking and kernel readout occur in

parallel. This mode is called reduced ROT as a part of the

ROT is done while the image row is readout. The actual ROT

can thus be longer, however the perceived ROT will be

shorter (‘overhead’ spent per line is reduced).

The integration time and gain parameters can be

reconfigured without any visible image artifact in Normal

ROT mode. Column−level offset corrections are required in

Zero ROT mode. Refer to Column−Level Image Correction

application note in the PYTHON Developer’s Guide

AND9362/D available at the Image Sensor Portal

This operation mode can be used for two reasons:

• Reduced total line time.

• Lower power due to reduced clock−rate.

Figure 13. Integration and Readout Sequence of the Sensor Operating in Pipelined Global Shutter Mode with

Non−Zero ROT Readout.

ROT

ys+1

ROT

Readout

Valid Data

FOT

()

Readout

Figure 14. Integration and Readout Sequence of the Sensor operating in Pipelined Global Shutter Mode with

Zero ROT Readout.

ROT

(blanked out)

ROT

Readout

ys+1

ROT

Readout

ye−1

ROT

Readout

dummy

Valid Data

FOT

()

NOIP1SN5000A

www.onsemi.com

Sensor States

Low Power Standby

In low power standby state, all power supplies are on, but

internally every block is disabled. No internal clock is

running (PLL / LVDS clock receiver is disabled).

All register settings are set to their default values (see

Table 27).

Only a subset of the SPI registers is active for read/write

in order to be able to configure clock settings and leave the

low power standby state. The only SPI registers that should

be touched are the ones required for the ‘Enable Clock

Management’ action described in Enable Clock

Management − Part 1 on page NO TAG

Standby (1)

In standby state, the PLL/LVDS clock receiver is running,

but the derived logic clock signal is not enabled.

Standby (2)

In standby state, the derived logic clock signal is running.

All SPI registers are active, meaning that all SPI registers

can be accessed for read or write operations. All other blocks

are disabled.

Idle

In the idle state, all internal blocks are enabled, except the

sequencer block. The sensor is ready to start grabbing

images as soon as the sequencer block is enabled.

Running

In running state, the sensor is enabled and grabbing

images. The sensor can be operated in global master/slave

modes.

User Actions: Power Up Functional Mode Sequences

Power Up Sequence

Figure 16 shows the power up sequence of the sensor. The

figure indicates that the first supply to ramp−up is the

vdd_18 supply, followed by vdd_33 and vdd_pix

respectively. It is important to comply with the described

sequence. Any other supply ramping sequence may lead to

high current peaks and, as consequence, a failure of the

sensor power up.

The clock input should start running when all supplies are

stabilized. When the clock frequency is stable, the reset_n

signal can be de−asserted. After a wait period of 10 ms, the

power up sequence is finished and the first SPI upload can

be initiated.

NOTE: The ‘clock input’ can be the CMOS PLL clock

input (clk_pll), or the LVDS clock input

(lvds_clock_inn/p) in case the PLL is bypassed.

Figure 16. Power Up Sequence

reset_n

vdd_18

vdd_33

clock input

vdd_pix

> 10us> 10us> 10us > 10us

SPI Upload

> 10us

Enable Clock Management

The ‘Enable Clock Management’ action configures the

clock management blocks and activates the clock generation

and distribution circuits in a pre−defined way. First, a set of

clock settings must be uploaded through the SPI register.

These settings are dependent on the desired operation mode

of the sensor.

All SPI uploads to be executed to configure the sensor are

available to customers under NDA at the

ON Semiconductor Image Sensor Portal

If the PLL is not used, the LVDS clock input must be

running.

Use of Phase Locked Loop

If PLL is used, the PLL is started after the upload of the

SPI registers. The PLL requires (dependent on the settings)

some time to generate a stable output clock. A lock detect

circuit detects if the clock is stable. When complete, this is

flagged in a status register.

Check the PLL_lock flag 24[0] by reading the SPI

Management− Part 2’ action can be continued. When PLL

is not used, this step can be bypassed as shown in Figure 15

on page 14.

Required Register Upload

In this phase, the ‘reserved’ register settings are uploaded

through the SPI register. Different settings are not allowed

and may cause the sensor to malfunction.

Soft Power Up

During the soft power up action, the internal blocks are

enabled and prepared to start processing the image data

stream. This action exists of a set of SPI uploads.

Enable Sequencer

During the ‘Enable Sequencer’ action, the frame grabbing

sequencer is enabled. The sensor starts grabbing images in

the configured operation mode. Refer to Sensor States on

page 15.

The ‘Enable Sequencer’ action consists of enabling bit

192[0].

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