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JM20330_Spec_Rev. 3.0.pdf
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更新于2023-03-03
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JM20330比较全面的规格书,内有引脚介绍、封装、各种参数等信息。JMicron公司的一款芯片。。。
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JMicron/JM20330
Version 3.0 March 2008
© JMicron 2008. All rights reserved. Page 1 Copying prohibited.
JM20330
Serial ATA Bridge Chip
Datasheet
Rev. 3.0
JMicron/JM20330
Version 3.0 March 2008
© JMicron 2008. All rights reserved. Page 2 Copying prohibited.
Revision History
Version Date Author Revision Description
Preliminary 2004-08-05
Initial B version
Preliminary 1 2004-08-27
Provide internal weak pull-low (Typical 31 KΩ) &
internal weak pull-high (Typical 31 KΩ).
2.0 2005-01-20
1.Support Multiple-Word DMA.
2.Modify the description of signals HSTROBE and
DSTROBE.
3.Modify the 6-10 Ultra DMA Transfer Rate to only
support 150Mhz operation.
4.Extend the ACTL from 20 bits to 40 bits.
2.1 2005-03-10
Modify Absolute Maximum Ratings voltage and
current.
2.2 2006-01-11
1.Add description of crystal Oscillator in page 14
2.Add industry spec. description in section 8.3
2.3 2006-07-20
1.Add power on sequence.
2.Modify Absolute Maximum Ratings voltage and
current.
3.Change the minimum commercial ambient
operation temperature from –10 to 0.
4.Revised REXT 12KΩ 1%
5.Add 6.11 section for device mode master-only
operation.
2.4 2006-10-30
1.Add the leakage current information.
2.Rise/Fall time meets Gen2 Spec.
3.Add description about MODE[2:0] pin
4.Modify the storage temperature.
5.Remove the min absolute Junction temperature.
6.Remove the Junction temperature information.
7.Modify 8.1 Power Requirements parameter
8.Add 8.7 Partial Power Consumption parameter.
9.Add 8.8 Slumber Power Consumption parameter.
2.5 2007-06-01
Modify REXT resistor for both 12KΩ 1% and 12.1
KΩ 1%
3.0 2008/03/31
1.Support SSC.
2.Remove the Vender Specific Command.
3.Remove the UART Interface Operation.
4.Remove the Partial Power Consumption.
5.Remove the Power-on Reset Sequence.
6.Add 2.2 Host Bridge figure.
7.Add 2.3 Device Bridge figure.
8.Modify 4.1 Package-Dimensions.
9.Modify 5.3 Parallel ATA Interface DASPn and SP.
10.Modify 5.5 Configuration Interface descriptions.
11.Add 6.9 Ultra DMA Transfer Rate descriptions.
12.Add 7.0 Power Management descriptions.
13.Modify 8.2 Absolute Maximum Ratings
parameter.
JMicron/JM20330
Version 3.0 March 2008
© JMicron 2008. All rights reserved. Page 3 Copying prohibited.
© Copyright JMicron Technology 2008.
All Rights Reserved.
Printed in Taiwan 2008
JMicron and the JMicron Logo are trademarks of JMicron Technology Corporation in Taiwan and/or other countries.
Other company, product and service names may be trademarks or service marks of others.
All information contained in this document is subject to change without notice. The products described in this
document are NOT intended for use implantation or other life supports application where malfunction may result in
injury or death to persons. The information contained in this document does not affect or change JMicron’s
product specification or warranties. Nothing in this document shall operate as an express or implied license or
environments, and is presented as an illustration. The results obtained in other operating environments may vary.
THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIEDE ON AN “AS IS” BASIS. In no event will
JMicron be liable for damages arising directly or indirectly from any use of the information contained in this
document.
JMicron Technology Corporation
1F, No.13,
Innovation Road 1,
Hsinchu Science Park
Hsinchu, Taiwan, R.O.C
For more information on JMicron products, please visit the JMicron web site at
http://www.JMicron.com or send email to sales@jmicron.com
JMicron/JM20330
Version 3.0 March 2008
© JMicron 2008. All rights reserved. Page 4 Copying prohibited.
Table of Contents
1. General Description..............................................................................................6
2. Features ...............................................................................................................7
2.1 General......................................................................................................7
2.2 Host Bridge................................................................................................8
2.3 Device Bridge ............................................................................................9
3. Block Diagram ....................................................................................................10
3.1 Physical Layer .........................................................................................10
3.2 Link Layer ................................................................................................10
3.3 Transport Layer .......................................................................................10
3.4 Application Layer .....................................................................................10
4. Package .............................................................................................................11
4.1 Package Dimensions ...............................................................................11
4.2 Package Pin-Out .....................................................................................13
4.3 Pin List Table ...........................................................................................14
5. Pin Description ...................................................................................................15
5.1 Pin Type Definition...................................................................................15
5.2 Crystal Interface.......................................................................................15
5.3 Serial ATA Interface .................................................................................15
5.4 Parallel ATA Interface...............................................................................16
5.5 Power Supply ..........................................................................................17
5.6 Configuration Interface ............................................................................18
5.7 Parallel ATA Reverse Order .....................................................................19
6. Supported ATA/ATAPI Command List.................................................................20
6.1 PIO Data-in Commands...........................................................................20
6.2 PIO Data-Out Commands........................................................................20
6.3 DMA Data-In Commands.........................................................................21
6.4 DMA Data-Out Commands ......................................................................21
6.5 Queued DMA Commands........................................................................21
6.6 PACKET/DIAG Commands .....................................................................21
6.7 Non-Data Commands ..............................................................................21
6.8 ATAPI PACKET Commands ....................................................................22
6.9 Ultra DMA Transfer Rate..........................................................................24
JMicron/JM20330
Version 3.0 March 2008
© JMicron 2008. All rights reserved. Page 5 Copying prohibited.
6.10 Master-Only Operation in Device Bridge Mode .......................................24
7. Power Management ...........................................................................................25
8. Electrical Characteristics ....................................................................................27
8.1 Power Requirements ...............................................................................27
8.2 Absolute Maximum Ratings .....................................................................27
8.3 Typical Operation Conditions...................................................................27
8.4 DC Characteristics...................................................................................28
8.5 ATA I/O DC Characteristics......................................................................28
8.6 ATA I/O AC Characteristics ......................................................................28
8.7 Slumber Power Consumption ..................................................................28
剩余27页未读,继续阅读
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