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Introduction
STM32Cube is an STMicroelectronics original initiative to significantly improve developer productivity by reducing development
effort, time and cost. STM32Cube covers the STM32 portfolio.
STM32Cube includes:
• STM32CubeMX, a graphical software configuration tool that allows the generation of C initialization code using graphical
wizards.
• A comprehensive embedded software platform, delivered per Series (such as STM32CubeF1 for STM32F1)
– The STM32Cube HAL, STM32 abstraction layer embedded software ensuring maximized portability across the
STM32 portfolio. HAL APIs are available for all peripherals.
– Low-layer APIs (LL) offering a fast light-weight expert-oriented layer which is closer to the hardware than the HAL. LL
APIs are available only for a set of peripherals.
– A consistent set of middleware components such as RTOS, USB, TCP/IP and Graphics.
– All embedded software utilities, delivered with a full set of examples.
The HAL driver layer provides a simple, generic multi-instance set of APIs (application programming interfaces) to interact with
the upper layer (application, libraries and stacks).
The HAL driver APIs are split into two categories: generic APIs, which provide common and generic functions for all the STM32
series and extension APIs, which include specific and customized functions for a given line or part number. The HAL drivers
include a complete set of ready-to-use APIs that simplify the user application implementation. For example, the communication
peripherals contain APIs to initialize and configure the peripheral, manage data transfers in polling mode, handle interrupts or
DMA, and manage communication errors.
The HAL drivers are feature-oriented instead of IP-oriented. For example, the timer APIs are split into several categories
following the IP functions, such as basic timer, capture and pulse width modulation (PWM). The HAL driver layer implements
run-time failure detection by checking the input values of all functions. Such dynamic checking enhances the firmware
robustness. Run-time detection is also suitable for user application development and debugging.
The LL drivers offer hardware services based on the available features of the STM32 peripherals. These services reflect exactly
the hardware capabilities, and provide atomic operations that must be called by following the programming model described in
the product line reference manual. As a result, the LL services are not based on standalone processes and do not require any
additional memory resources to save their states, counter or data pointers. All operations are performed by changing the
content of the associated peripheral registers. Unlike the HAL, LL APIs are not provided for peripherals for which optimized
access is not a key feature, or for those requiring heavy software configuration and/or a complex upper-level stack (such as
USB).
The HAL and LL are complementary and cover a wide range of application requirements:
• The HAL offers high-level and feature-oriented APIs with a high-portability level. These hide the MCU and peripheral
complexity from the end-user.
• The LL offers low-level APIs at register level, with better optimization but less portability. These require deep knowledge of
the MCU and peripheral specifications.
The HAL- and LL-driver source code is developed in Strict ANSI-C, which makes it independent of the development tools. It is
checked with the CodeSonar
®
static analysis tool. It is fully documented.
It is compliant with MISRA C
®
:2004 standard.
Description of STM32F1 HAL and low-layer drivers
UM1850
User manual
UM1850 - Rev 3 - February 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
This user manual is structured as follows:
• Overview of HAL drivers
• Overview of low-layer drivers
• Cohabiting of HAL and LL drivers
• Detailed description of each peripheral driver: configuration structures, functions, and how to use the given API to build
your application
UM1850
UM1850 - Rev 3
page 2/1208
2 Acronyms and definitions
Table 1. Acronyms and definitions
Acronym Definition
ADC Analog-to-digital converter
AES Advanced encryption standard
ANSI American national standards institute
API Application programming interface
BSP Board support package
CAN Controller area network
CEC Consumer electronic controller
CMSIS Cortex microcontroller software interface standard
COMP Comparator
CORDIC Trigonometric calculation unit
CPU Central processing unit
CRC CRC calculation unit
CRYP Cryptographic processor
CSS Clock security system
DAC Digital to analog converter
DLYB Delay block
DCMI Digital camera interface
DFSDM Digital filter sigma delta modulator
DMA Direct memory access
DMAMUX Direct memory access request multiplexer
DSI Display serial interface
DTS Digital temperature sensor
ETH Ethernet controller
EXTI External interrupt/event controller
FDCAN Flexible data-rate controller area network unit
FLASH Flash memory
FMAC Filtering mathematical calculation unit
FMC Flexible memory controller
FW Firewall
GFXMMU
Chrom-GRC
™
GPIO General purpose I/Os
GTZC Global TrustZone controller
GTZC-MPCBB GTZC block-based memory protection controller
GTZC-MPCWM GTZC watermark memory protection controller
GTZC-TZIC GTZC TrustZone illegal access controller
GTZC-TZSC GTZC TrustZone security controller
UM1850
Acronyms and definitions
UM1850 - Rev 3
page 4/1208
Acronym Definition
HAL Hardware abstraction layer
HASH Hash processor
HCD USB host controller driver
HRTIM High-resolution timer
I2C Inter-integrated circuit
I2S Inter-integrated sound
ICACHE Instruction cache
IRDA Infrared data association
IWDG Independent watchdog
JPEG Joint photographic experts group
LCD Liquid crystal display controler
LTDC LCD TFT Display Controller
LPTIM Low-power timer
LPUART Low-power universal asynchronous receiver/transmitter
MCO Microcontroller clock output
MDIOS Management data input/output (MDIO) slave
MDMA Master direct memory access
MMC MultiMediaCard
MPU Memory protection unit
MSP MCU specific package
NAND NAND Flash memory
NOR NOR Flash memory
NVIC Nested vectored interrupt controller
OCTOSPI Octo-SPI interface
OPAMP Operational amplifier
OTFDEC On-the-fly decryption engine
OTG-FS USB on-the-go full-speed
PKA Public key accelerator
PCD USB peripheral controller driver
PSSI Parallel synchronous slave interface
PWR Power controller
QSPI QuadSPI Flash memory
RAMECC RAM ECC monitoring
RCC Reset and clock controller
RNG Random number generator
RTC Real-time clock
SAI Serial audio interface
SD Secure digital
SDMMC SD/SDIO/MultiMediaCard card host interface
SMARTCARD Smartcard IC
UM1850
Acronyms and definitions
UM1850 - Rev 3
page 5/1208
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