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Allwinner_V3s_Datasheet_V1.0.pdf
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全志v3s datasheet 共420页。 Allwinner V3s Datasheet Cost-efficient Video Encoding Processor Version 1.0 Nov.17,2014
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Allwinner V3s Datasheet
Cost-efficient Video Encoding Processor
Version 1.0
Nov.17,2014
Copyright© 2014 Allwinner Technology Co.,Ltd. All Rights Reserved.
V3s
V3s Datasheet(Revision 1.0) Copyright© 2014 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 2
Declaration
This documentation is the original work and copyrighted property of Allwinner Technology Co.,Ltd.(“Allwinner”).
Reproduction in whole or in part must obtain the written approval of Allwinner and give clear acknowledgement to the
copyright owner.
The information furnished by Allwinner is believed to be accurate and reliable. Allwinner reserves the right to make
changes in circuit design and/or specifications at any time without notice. Allwinner does not assume any responsibility
and liability for its use. Nor for any infringements of patents or other rights of the third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of Allwinner. This
documentation neither states nor implies warranty of any kind, including fitness for any particular application.
Third party licences may be required to implement the solution/product. Customers shall be solely responsible to
obtain all appropriately required third party licences. Allwinner shall not be liable for any licence fee or royalty due in
respect of any required third party licence. Allwinner shall have no warranty, indemnity or other obligations with
respect to matters covered under any required third party licence.
V3s
V3s Datasheet(Revision 1.0) Copyright© 2014 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 3
Revision History
Version
Date
Description
V1.0
Nov.17,2014
Initial release version
V3s
V3s Datasheet(Revision 1.0) Copyright© 2014 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 4
Table of Contents
Declaration ............................................................................................................................................................................ 2
Revision History..................................................................................................................................................................... 3
Table of Contents .................................................................................................................................................................. 4
Chapter 1 About This Documentation ......................................................................................................................... 36
1.1. Documentation Overview ........................................................................................................................... 36
1.2. Acronyms and abbreviations ....................................................................................................................... 36
Chapter 2 Overview ..................................................................................................................................................... 40
2.1. Processor Features ...................................................................................................................................... 41
2.1.1. CPU Architecture ................................................................................................................................. 41
2.1.2. Memory Subsystem ............................................................................................................................. 41
2.1.2.1. Boot ROM .................................................................................................................................... 41
2.1.2.2. SDRAM ........................................................................................................................................ 41
2.1.2.3. SD/MMC Interface ...................................................................................................................... 41
2.1.3. System Peripheral ................................................................................................................................ 42
2.1.3.1. Timer ........................................................................................................................................... 42
2.1.3.2. High Speed Timer ........................................................................................................................ 42
2.1.3.3. GIC ............................................................................................................................................... 42
2.1.3.4. DMA ............................................................................................................................................ 42
2.1.3.5. CCU .............................................................................................................................................. 42
2.1.3.6. PWM ........................................................................................................................................... 43
2.1.3.7. RTC .............................................................................................................................................. 43
V3s
V3s Datasheet(Revision 1.0) Copyright© 2014 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 5
2.1.3.8. LRADC .......................................................................................................................................... 43
2.1.3.9. Crypto Engine .............................................................................................................................. 43
2.1.4. Display Subsystem ............................................................................................................................... 43
2.1.4.1. Display Engine2.0 ........................................................................................................................ 43
2.1.4.2. Display Output ............................................................................................................................ 44
2.1.5. Video Engine ....................................................................................................................................... 44
2.1.5.1. Video Decoding ........................................................................................................................... 44
2.1.5.2. Video Encoding ........................................................................................................................... 44
2.1.6. Image Subsystem ................................................................................................................................. 44
2.1.6.1. Image Input ................................................................................................................................. 44
2.1.6.2. ISP ................................................................................................................................................ 45
2.1.7. Audio Subsystem ................................................................................................................................. 45
2.1.7.1. Audio codec ................................................................................................................................. 45
2.1.8. External Peripherals ............................................................................................................................ 46
2.1.8.1. USB .............................................................................................................................................. 46
2.1.8.2. Ethernet ...................................................................................................................................... 46
2.1.8.3. UART............................................................................................................................................ 46
2.1.8.4. SPI ................................................................................................................................................ 46
2.1.8.5. TWI .............................................................................................................................................. 47
2.1.9. Package ................................................................................................................................................ 47
2.2. System Block Diagram ................................................................................................................................. 48
Chapter 3 Pin Description ............................................................................................................................................ 49
3.1. Pin Characteristics ....................................................................................................................................... 49
3.2. GPIO Multiplex Functions ............................................................................................................................ 53
剩余419页未读,继续阅读
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