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RTL8367RB-CG
LAYER 2 MANAGED 5+2-PORT 10/100/1000M SWITCH CONTROLLER
DATASHEET
(CONFIDENTIAL: Development Partners Only)
Rev. 1.0
09 June 2011
Track ID: JATR-2265-11
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211 Fax: +886-3-577-6047
www.realtek.com
RTL8367RB
Datasheet
Layer 2 Managed 5+2-Port 10/100/1000M Switch Controller ii Track ID: JATR-2265-11 Rev. 1.0
COPYRIGHT
©2011 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced,
transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any
means without the written permission of Realtek Semiconductor Corp.
DISCLAIMER
Realtek provides this document “as is”, without warranty of any kind. Realtek may make improvements
and/or changes in this document or in the product described in this document at any time. This document
could include technical inaccuracies or typographical errors.
TRADEMARKS
Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document
are trademarks/registered trademarks of their respective owners.
USING THIS DOCUMENT
This document is intended for the hardware and software engineer’s general information on the Realtek
RTL8367RB IC.
Though every effort has been made to ensure that this document is current and accurate, more information
may have become available subsequent to the production of this guide.
REVISION HISTORY
Revision Release Date Summary
1.0 2011/06/09 First release.
RTL8367RB
Datasheet
Layer 2 Managed 5+2-Port 10/100/1000M Switch Controller iii Track ID: JATR-2265-11 Rev. 1.0
Table of Contents
1. GENERAL DESCRIPTION ..............................................................................................................................................1
2. FEATURES.........................................................................................................................................................................3
3. SYSTEM APPLICATIONS...............................................................................................................................................5
4. APPLICATION EXAMPLES ...........................................................................................................................................6
4.1. 5-PORT 1000BASE-T SWITCH ......................................................................................................................................6
4.2. 5-PORT 1000BASE-T ROUTER WITH DUAL MII/RGMII...............................................................................................7
5. BLOCK DIAGRAM ...........................................................................................................................................................8
6. PIN ASSIGNMENTS .........................................................................................................................................................9
6.1. PACKAGE IDENTIFICATION...........................................................................................................................................9
6.2. PIN ASSIGNMENT TABLE............................................................................................................................................10
7. PIN DESCRIPTIONS.......................................................................................................................................................13
7.1. MEDIA DEPENDENT INTERFACE PINS.........................................................................................................................13
7.2. GENERAL PURPOSE INTERFACES................................................................................................................................14
7.2.1. RGMII Pins...........................................................................................................................................................14
7.2.2. MII Pins................................................................................................................................................................16
7.3. LED PINS...................................................................................................................................................................19
7.4. CONFIGURATION STRAPPING PINS .............................................................................................................................20
7.5. CONFIGURATION STRAPPING PINS (DISAUTOLOAD AND DIS_8051).....................................................................22
7.6. MANAGEMENT INTERFACE PINS ................................................................................................................................22
7.7. MISCELLANEOUS PINS ...............................................................................................................................................23
7.8. TEST PINS ..................................................................................................................................................................23
7.9. POWER AND GND PINS ..............................................................................................................................................23
8. PHYSICAL LAYER FUNCTIONAL OVERVIEW......................................................................................................24
8.1. MDI INTERFACE ........................................................................................................................................................24
8.2. 1000BASE-T TRANSMIT FUNCTION ...........................................................................................................................24
8.3. 1000BASE-T RECEIVE FUNCTION ..............................................................................................................................24
8.4. 100BASE-TX TRANSMIT FUNCTION...........................................................................................................................24
8.5. 100BASE-TX RECEIVE FUNCTION .............................................................................................................................25
8.6. 10BASE-T TRANSMIT FUNCTION ...............................................................................................................................25
8.7. 10BASE-T RECEIVE FUNCTION ..................................................................................................................................25
8.8. AUTO-NEGOTIATION FOR UTP ..................................................................................................................................25
8.9. CROSSOVER DETECTION AND AUTO CORRECTION.....................................................................................................26
8.10. POLARITY CORRECTION .............................................................................................................................................26
9. GENERAL FUNCTION DESCRIPTION......................................................................................................................27
9.1. RESET ........................................................................................................................................................................27
9.1.1. Hardware Reset ....................................................................................................................................................27
9.1.2. Software Reset ......................................................................................................................................................27
9.2. IEEE 802.3X FULL DUPLEX FLOW CONTROL ............................................................................................................27
9.3. HALF DUPLEX FLOW CONTROL .................................................................................................................................28
9.3.1. Back-Pressure Mode ............................................................................................................................................28
9.4. SEARCH AND LEARNING ............................................................................................................................................29
9.5. SVL AND IVL/SVL ...................................................................................................................................................29
9.6. ILLEGAL FRAME FILTERING .......................................................................................................................................29
9.7. IEEE 802.3 RESERVED GROUP ADDRESSES FILTERING CONTROL.............................................................................30
9.8. BROADCAST/MULTICAST/UNKNOWN DA STORM CONTROL .....................................................................................31
RTL8367RB
Datasheet
Layer 2 Managed 5+2-Port 10/100/1000M Switch Controller iv Track ID: JATR-2265-11 Rev. 1.0
9.9.
PORT SECURITY FUNCTION ........................................................................................................................................31
9.10. MIB COUNTERS .........................................................................................................................................................31
9.11. PORT MIRRORING ......................................................................................................................................................31
9.12. VLAN FUNCTION ......................................................................................................................................................32
9.12.1. Port-Based VLAN ............................................................................................................................................32
9.12.2. IEEE 802.1Q Tag-Based VLAN.......................................................................................................................32
9.12.3. Protocol-Based VLAN .....................................................................................................................................33
9.12.4. Port VID ..........................................................................................................................................................33
9.13. QOS FUNCTION ..........................................................................................................................................................34
9.13.1. Input Bandwidth Control .................................................................................................................................34
9.13.2. Priority Assignment .........................................................................................................................................34
9.13.3. Priority Queue Scheduling...............................................................................................................................35
9.13.4. IEEE 802.1p/Q and DSCP Remarking ............................................................................................................35
9.13.5. ACL-Based Priority .........................................................................................................................................36
9.14. IGMP & MLD SNOOPING FUNCTION.........................................................................................................................36
9.15. IEEE 802.1X FUNCTION.............................................................................................................................................36
9.15.1. Port-Based Access Control..............................................................................................................................36
9.15.2. Authorized Port-Based Access Control ...........................................................................................................37
9.15.3. Port-Based Access Control Direction..............................................................................................................37
9.15.4. MAC-Based Access Control.............................................................................................................................37
9.15.5. MAC-Based Access Control Direction ............................................................................................................37
9.15.6. Optional Unauthorized Behavior.....................................................................................................................37
9.15.7. Guest VLAN .....................................................................................................................................................37
9.16. IEEE 802.1D FUNCTION ............................................................................................................................................38
9.17. EMBEDDED 8051........................................................................................................................................................38
9.18. REALTEK CABLE TEST (RTCT) .................................................................................................................................38
9.19. LED INDICATORS.......................................................................................................................................................39
9.20. GREEN ETHERNET......................................................................................................................................................40
9.20.1. Link-On and Cable Length Power Saving .......................................................................................................40
9.20.2. Link-Down Power Saving ................................................................................................................................40
9.21. IEEE 802.3AZ ENERGY EFFICIENT ETHERNET (EEE) FUNCTION ...............................................................................41
9.22. INTERRUPT PIN FOR EXTERNAL CPU.........................................................................................................................41
10. INTERFACE DESCRIPTIONS .................................................................................................................................42
10.1. EEPROM SMI HOST TO EEPROM ...........................................................................................................................42
10.2. EEPROM SMI SLAVE FOR EXTERNAL CPU..............................................................................................................43
10.3. GENERAL PURPOSE INTERFACE..................................................................................................................................44
10.3.1. Extension Ports RGMII Mode (1Gbps)............................................................................................................45
10.3.2. Extension Ports MII MAC/PHY Mode Interface (10/100Mbps) ......................................................................46
11. REGISTER DESCRIPTIONS ....................................................................................................................................48
11.1. PCS REGISTER (PHY 0~4).........................................................................................................................................48
11.2. REGISTER 0: CONTROL...............................................................................................................................................49
11.3. REGISTER 1: STATUS ..................................................................................................................................................50
11.4. REGISTER 2: PHY IDENTIFIER 1 .................................................................................................................................51
11.5. REGISTER 3: PHY IDENTIFIER 2 .................................................................................................................................51
11.6. REGISTER 4: AUTO-NEGOTIATION ADVERTISEMENT .................................................................................................51
11.7. REGISTER 5: AUTO-NEGOTIATION LINK PARTNER ABILITY.......................................................................................52
11.8. REGISTER 6: AUTO-NEGOTIATION EXPANSION ..........................................................................................................53
11.9. REGISTER 7: AUTO-NEGOTIATION PAGE TRANSMIT REGISTER..................................................................................53
11.10. REGISTER 8: AUTO-NEGOTIATION LINK PARTNER NEXT PAGE REGISTER ............................................................54
11.11. REGISTER 9: 1000BASE-T CONTROL REGISTER ....................................................................................................54
11.12. REGISTER 10: 1000BASE-T STATUS REGISTER .....................................................................................................55
11.13. REGISTER 15: EXTENDED STATUS.........................................................................................................................55
RTL8367RB
Datasheet
Layer 2 Managed 5+2-Port 10/100/1000M Switch Controller v Track ID: JATR-2265-11 Rev. 1.0
12.
ELECTRICAL CHARACTERISTICS......................................................................................................................56
12.1. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................56
12.2. RECOMMENDED OPERATING RANGE..........................................................................................................................56
12.3. THERMAL CHARACTERISTICS.....................................................................................................................................57
12.3.1. Assembly Description ......................................................................................................................................57
12.3.2. Material Properties .........................................................................................................................................57
12.3.3. Simulation Conditions .....................................................................................................................................57
12.3.4. Thermal Performance of E-Pad LQFP-128 on PCB Under Still Air Convection ...........................................58
12.3.5. Thermal Performance of E-Pad LQFP-128 on PCB Under Forced Convection ............................................58
12.4. DC CHARACTERISTICS...............................................................................................................................................59
12.5. AC CHARACTERISTICS...............................................................................................................................................60
12.5.1. EEPROM SMI Host Mode Timing Characteristics .........................................................................................60
12.5.2. EEPROM SMI Slave Mode Timing Characteristics ........................................................................................61
12.5.3. MDIO Slave Mode Timing Characteristics .....................................................................................................62
12.5.4. MII MAC Mode Timing ...................................................................................................................................63
12.5.5. MII PHY Mode Timing ....................................................................................................................................64
12.5.6. RGMII Timing Characteristics ........................................................................................................................65
12.6. POWER AND RESET CHARACTERISTICS ......................................................................................................................67
13. MECHANICAL DIMENSIONS.................................................................................................................................68
14. ORDERING INFORMATION...................................................................................................................................69
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