SystemC设计MIPSCPU文档

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MIPS 处理器的设计与实现

[基于 SystemC]

F0603028

5060309078

朱一和

2008-4-2

实验目的 ................................................................................................................................................................... 6

实验工具 .......................................................................................................................................................... 6

实验要求 .......................................................................................................................................................... 6

SystemC .................................................................................................................................................................... 7

SystemC 介绍 ................................................................................................................................................ 7

SystemC 配置 ................................................................................................................................................ 8

步骤一：编译 SystemC 库 ................................................................................................................. 8

步骤二：更新 SystemC include file 和 library ............................................................................. 8

步骤三：创建 SystemC 应用程序 .................................................................................................... 8

SystemC 选用理由及体会 ........................................................................................................................10

MIPS 处理器基本原理........................................................................................................................................11

实现的指令集 ...............................................................................................................................................12

MIPS 指令执行过程 ..........................................................................................................................13

MIPS 流水结构 .............................................................................................................................................13

IF 阶段....................................................................................................................................................13

ID 阶段 ...................................................................................................................................................13

EXE 阶段................................................................................................................................................14

MEM 阶段 .............................................................................................................................................14

WB 阶段.................................................................................................................................................14

Hazard 处理 .................................................................................................................................................15

结构 hazard ..........................................................................................................................................15

数据 hazard ..........................................................................................................................................15

控制 hazard ..........................................................................................................................................16

Cache 原理 ...................................................................................................................................................17

Cache 的基本结构 ..............................................................................................................................17

Cache 与 DRAM 存取的一致性 .......................................................................................................18

SystemC 实现 .......................................................................................................................................................20

总体设计思想 ...............................................................................................................................................20

控制信号汇总 ...............................................................................................................................................21

hazard 处理设计.........................................................................................................................................22

数据 hazard ..........................................................................................................................................22

控制 hazard ..........................................................................................................................................22

基本元件 ........................................................................................................................................................23

指令加法器...........................................................................................................................................23

立即数符号扩展器 .............................................................................................................................23

寄存器堆 ...............................................................................................................................................24

指令 sll/slr/sra ALU 操作数提取.....................................................................................................25

ALU..........................................................................................................................................................25

流水五个阶段 ...............................................................................................................................................28

START_IF 中间寄存器 ........................................................................................................................28

IF_ID 中间寄存器 ................................................................................................................................29

ID_EX 中间寄存器..............................................................................................................................30

EX_MEM 中间寄存器 ........................................................................................................................32

MEM_WB 中间寄存器 ......................................................................................................................33

Hazard 处理 .................................................................................................................................................34

Cache 实现 ...................................................................................................................................................38

LRU 替换算法.......................................................................................................................................40

MIPS CPU 基本功能测试 ...................................................................................................................................45

测试 add，lw 和 branch ............................................................................................................................47