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HI0069E_gic_architecture_specification_v3.pdf
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The GICv3 architecture is designed to operate with Armv8-A and Armv8-R compliant processing elements, PEs. The Generic Interrupt Controller (GIC) architecture defines: • The architectural requirements for handling all interrupt sources for any PE connected to a GIC. • A common interrupt controller programming interface applicable to uniprocessor or multiprocessor systems
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Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved.
Arm IHI 0069E (ID012119)
Arm
®
Generic Interrupt Controller
Architecture Specification
GIC architecture version 3 and version 4
ii Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved. Arm IHI 0069E
Non-Confidential ID012119
Arm Generic Interrupt Controller Architecture Specification
GIC architecture version 3 and version 4
Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved.
Release Information
The following changes have been made to this document.
Some of the information in this specification was previously published in Arm
®
Generic Interrupt Controller, Architecture version
2.0, Architecture Specification.
Proprietary Notice
This document is protected by copyright and other related rights and the practice or implementation of the information contained
in this document may be protected by one or more patents or pending patent applications. No part of this document may be
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Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved.
Arm Limited. Company 02557590 registered in England.
Change History
Date Issue Confidentiality Change
June 2015 A Non-confidential First release of GICv3 and GICv4 issue A
December 2015 B Non-confidential First release of GICv3 and GICv4 issue B
July 2016 C Non-confidential First release of GICv3 and GICv4 issue C
August 2017 D Non-confidential First release of GICv3 and GICv4 issue D
January 2019 E Non-confidential First release of GICv3 and GICv4 issue E
Arm IHI 0069E Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved. iii
ID012119 Non-Confidential
110 Fulbourn Road, Cambridge, England CB1 9NJ.
LES-PRE-20349
Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in
accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to.
Product Status
The information in this document is final, that is for a developed product.
Web Address
http://www.arm.com
iv Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved. Arm IHI 0069E
Non-Confidential ID012119
Arm IHI 0069E Copyright © 2008, 2011, 2015-2019 Arm Limited or its affiliates. All rights reserved. v
ID012119 Non-Confidential
Contents
Arm Generic Interrupt Controller Architecture
Specification GIC architecture version 3 and version
4
Preface
About this specification ............................................................................................... x
Using this specification ............................................................................................... xi
Conventions ............................................................................................................... xii
Additional reading ..................................................................................................... xiii
Feedback .................................................................................................................. xiv
Chapter 1 Introduction
1.1 About the Generic Interrupt Controller (GIC) .......................................................... 1-16
1.2 Terminology ........................................................................................................... 1-19
1.3 Supported configurations and compatibility ............................................................ 1-23
Chapter 2 Distribution and Routing of Interrupts
2.1 The Distributor and Redistributors .......................................................................... 2-30
2.2 INTIDs .................................................................................................................... 2-31
2.3 Affinity routing ........................................................................................................ 2-35
Chapter 3 GIC Partitioning
3.1 The GIC logical components .................................................................................. 3-38
3.2 Interrupt bypass support ........................................................................................ 3-43
Chapter 4 Physical Interrupt Handling and Prioritization
4.1 Interrupt lifecycle .................................................................................................... 4-46
4.2 Locality-specific Peripheral Interrupts .................................................................... 4-53
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