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首页JESD220E-----UFS3.0 协议.PDF
JEDEC已经发布了UFS3.1规范(又名JESD220E),它在标准中增加了一些和性能、功率、成本削减、可靠性相关的特性。这些新功能和特性有望提高实际设备性能,最大限度地降低功耗,潜在地降低高容量存储设备成本,并改善用户体验。 符合UFS3.1标准的设备继续使用MIPI的M-PHY4.1物理层和8b/10b线路编码,MIPI基于UniPro 1.8协议的互连层(IL),每通道数据速率为HS-G4(11.6Gbps)。同时,新版本的规范支持三个新特性:写增强、深度睡眠和性能限制通知。此外,JEDEC还发布了主机性能提升技术规范。现代固态硬盘已经支持所有这些功能,因此UFS3.1规范和HP,使UFS存储设备在功能上更接近固态硬盘。 顾名思义,写增强(Write Booster)旨在通过使用伪SLC缓存来提高写入速度。SSD和各种由NVMe驱动的微型存储设备(例如Apple的iPhone/iPad中使用的存储设备)已经使用了类似的技术。同样,SD6.0标准支持缓存以达到写入性能目标。 UFS3.1技术的第二个重要的新功能是深度睡眠(Deep Sleep),这是一种新的低功耗状态,适用于廉价的UFS设备,这些设备使用相同的稳压器进行存储和其他功能。另一个新功能是性能限制通知,该功能使UFS设备可以在过热时通知主机有关性能限制的信息。最终,避免节流意味着更稳定的性能。
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JEDEC
STANDARD
Universal Flash Storage (UFS)
Version 3.0
JESD220D
(Revision of JESD220C, March 2016)
JANUARY 2018
JEDEC SOLID STATE TECHNOLOGY ASSOCIATION

NOTICE
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through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC
legal counsel.
JEDEC standards and publications are designed to serve the public interest through eliminating
misunderstandings between manufacturers and purchasers, facilitating interchangeability and
improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the
proper product for use by those other than JEDEC members, whether the standard is to be used either
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JEDEC standards and publications are adopted without regard to whether or not their adoption may
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The information included in JEDEC standards and publications represents a sound approach to product
specification and application, principally from the solid state device manufacturer viewpoint. Within the
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This document is copyrighted by JEDEC and may not be
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or refer to www.jedec.org under Standards-Documents/Copyright Information.


JEDEC Standard No. 220D
-i-
UNIVERSAL FLASH STORAGE (UFS)
Contents
Page
1 Scope 1
2 Normative Reference 1
3 Terms and Definitions 2
3 Terms and Definitions (cont’d) 3
3.1 Acronyms 3
3.1 Acronyms (cont’d) 4
3.2 Conventions 4
3.3 Keywords 5
3.4 Abbreviations 5
4 Introduction 6
4.1 General Features 6
4.2 Interface Features 7
4.3 Functional Features 7
5 UFS Architecture Overview 8
5.1 UFS Top Level Architecture 8
5.2 UFS System Model 11
5.3 System Boot and Enumeration 11
5.4 UFS Interconnect (UIC) Layer 12
5.4.1 UFS Physical Layer Signals 12
5.4.2 MIPI UniPro 12
5.4.3 MIPI UniPro Related Attributes 13
5.5 UFS Transport Protocol (UTP) Layer 13
5.5.1 Architectural Model 14
5.6 UFS Application and Command Layer 18
5.7 Mechanical 19
6 UFS Electrical: Clock, Reset, Signals and Supplies 20
6.1 UFS Signals 20
6.2 Reset Signal 22
6.3 Power Supplies 22
6.4 Reference Clock 23
6.4 Reference Clock (cont’d) 24
6.4.1 HS Gear Rates 26
6.4.2 Host Controller requirements for reference clock generation 27
6.5 External Charge Pump Capacitors (Optional) 28
6.6 Absolute Maximum DC Ratings and Operating Conditions 29
7 Reset, Power-up and Power-down 30
7.1 Reset 30
7.1.1 Power-on Reset 30
7.1.2 Hardware Reset 31
7.1.3 EndPointReset 32
7.1.4 Logical Unit Reset 33
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