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Integrated System-Level Modeling of Network-on-Chip enabled Mult...

Integrated

System-Level

Modeling

Network-on-Chip

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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms.pdf springer

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NETWORK-ON-CHIP ENABLED MULTI-PROCESSOR PLATFORMS

INTEGRATED SYSTEM-LEVEL MODELING OF

Integrated System-Level Modeling

of Network-on-Chip enabled

Multi-Processor Platforms

Kogel Tim

CoWare, Aachen, Germany

Leupers Rainer

RWTH Aachen, Germany

Meyr Heinrich

RWTH Aachen, Germany

A C.I.P. Catalogue record for this book is available from the Library of Congress.

Published by Springer,

P.O. Box 17, 3300 AA Dordrecht, The Netherlands.

www.springer.com

Printed on acid-free paper

No part of this work may be reproduced, stored in a retrieval system, or transmitted

in any form or by any means, electronic, mechanical, photocopying, microfilming, recording

or otherwise, without written permission from the Publisher, with the exception

of any material supplied specifically for the purpose of being entered

and executed on a computer system, for exclusive use by the purchaser of the work.

Printed in the Netherlands.

ISBN-10 1-4020-4825-4 (HB)

ISBN-10 1-4020-4826-2 (e-books)

ISBN-13 978-1-4020-4826-2 (e-books)

ISBN-13 978-1-4020-4825-4 (HB)

Gewidmet meiner Frau Miriam,

meinen S

ohnen Leon und Nathan, und

meinen Eltern Walter und Renate.

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