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CD74HC4066数据手册.pdf
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CD74HC4066数据手册,74HCT4066是四路单刀单掷模拟开关。 每个开关具有两个输入/输出端子(nY和nZ)和一个有效的HIGH使能输入(nE)。嵌入式,单片机开发人员必备。
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1
Data sheet acquired from Harris Semiconductor
SCHS208D
Features
• Wide Analog-Input-Voltage Range . . . . . . . . . . 0V - 10V
• Low “ON” Resistance
-V
CC
= 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25Ω
-V
CC
= 9V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15Ω
• Fast Switching and Propagation Delay Times
• Low “OFF” Leakage Current
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• HC Types
- 2V to 10V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V and 10V
• HCT Types
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Description
The ’HC4066 and CD74HCT4066 contain four independent
digitally controlled analog switches that use silicon-gate
CMOS technology to achieve operating speeds similar to
LSTTL with the low power consumption of standard CMOS
integrated circuits.
These switches feature the characteristic linear “ON”
resistance of the metal-gate CD4066B. Each switch is
turned on by a high-level voltage on its control input.
Pinout
CD54HC4066 (CERDIP)
CD74HC4066 (PDIP, SOIC, TSSOP)
CD74HCT4066 (PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC4066F3A -55 to 125 14 Ld CERDIP
CD74HC4066E -55 to 125 14 Ld PDIP
CD74HC4066M -55 to 125 14 Ld SOIC
CD74HC4066MT -55 to 125 14 Ld SOIC
CD74HC4066M96 -55 to 125 14 Ld SOIC
CD74HC4066PW -55 to 125 14 Ld TSSOP
CD74HC4066PWR -55 to 125 14 Ld TSSOP
CD74HC4066PWT -55 to 125 14 Ld TSSOP
CD74HCT4066E -55 to 125 14 Ld PDIP
CD74HCT4066M -55 to 125 14 Ld SOIC
CD74HCT4066MT -55 to 125 14 Ld SOIC
CD74HCT4066M96 -55 to 125 14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
1Y
1Z
2Z
2Y
2E
3E
GND
V
CC
1E
4E
4Y
4Z
3Z
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
February 1998 - Revised August 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC4066, CD74HC4066,
CD74HCT4066
High-Speed CMOS Logic
Quad Bilateral Switch
[
/Title
(
CD74H
C
4066,
C
D74H
C
T4066
)
/
Subject
(
High-
S
peed
C
MOS
L
ogic
Q
uad
2
Functional Diagram
Logic Diagram
TRUTH TABLE
INPUT
nE SWITCH
L Off
H
On
H= High Level
L= Low Level
1
2
4
3
9
10
11
8
13
5
12
6
4E
3E
2E
1E
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
GND = 7
V
CC
= 14
nY
nZ
nE
p
n
p
n
CD54HC4066, CD74HC4066, CD74HCT4066
3
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, V
CC
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 10.5V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Switch Current, I
O
(Note 1)
For -0.5V < V
O
< V
CC
+ 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V
CC
or Ground Current, I
CC
. . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 10V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
Thermal Resistance (Typical, Note 2) θ
JA
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . 80
o
C/W
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . 86
o
C/W
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . 113
o
C/W
Maximum Junction Temperature (Hermetic Package or Die) . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. In certain applications, the external load-resistor current may include both V
CC
and signal-line components. To avoid drawing V
CC
current
when switch current flows into the transmission gate inputs, (terminals 1, 4, 8 and 11) the voltage drop across the bidirectional switch
must not exceed 0.6V (calculated from R
ON
values shown in the DC Electrical Specifications Table). No V
CC
current will flow through
R
L
if the switch current flows into terminals 2, 3, 9 and 10.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSV
I
(V) V
IS
(V) MIN TYP MAX MIN MAX MIN MAX
HC TYPES
High Level Input
Voltage
V
IH
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V
9 6.3 - - 6.3 - 6.3 - V
Low Level Input
Voltage
V
IL
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V
9 - - 2.7 - 2.7 - 2.7 V
Input Leakage
Current
(Any Control)
I
IL
V
CC
or
GND
-10--±0.1 - ±1-±1 µA
Off-Switch Leakage
Current
I
Z
V
IL
V
CC
or
GND
10 - - ±0.1 - ±1-±1 µA
CD54HC4066, CD74HC4066, CD74HCT4066
4
“ON” Resistance
I
O
= 1mA
(Figure 1)
R
ON
V
CC
V
CC
or
GND
4.5 - 25 80 - 106 - 128 Ω
6 - 20 75 - 94 - 113 Ω
9 - 15 60 - 78 - 95 Ω
V
CC
to
GND
4.5 - 35 95 - 118 - 142 Ω
6 - 24 84 - 105 - 126 Ω
9 - 16 70 - 88 - 105 Ω
“ON” Resistance
Between Any Two
Switches
∆R
ON
V
CC
-4.5-1-----Ω
6 - 0.75 - ----Ω
9-0.5-----Ω
Quiescent Device
Current
I
CC
V
CC
or
GND
- 6 - - 2 - 20 - 40 µA
10 - - 16 - 160 - 320 µA
HCT TYPES
High Level Input
Voltage
V
IH
- - 4.5 to
5.5
2-- 2 - 2 - V
Low Level Input
Voltage
V
IL
- - 4.5 to
5.5
- - 0.8 - 0.8 - 0.8 V
Input Leakage
Current
(Any Control)
I
IL
V
CC
or
GND
- 5.5 - - ±0.1 - ±1-±1 µA
Off-Switch Leakage
Current
I
Z
V
IL
V
CC
or
GND
5.5 - - ±0.1 - ±1-±1 µA
“ON” Resistance
I
O
= 1mA
(Figure 1)
R
ON
V
CC
V
CC
or
GND
4.5 - 25 80 - 106 - 128 Ω
V
CC
to
GND
4.5 - 35 95 - 118 - 142 Ω
“ON” Resistance
Between Any Two
Switches
∆R
ON
V
CC
-4.5-1-----Ω
Quiescent Device
Current
I
CC
V
CC
or
GND
- 5.5 - - 2 - 20 - 40 µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
CC
(Note 3)
V
CC
- 2.1
- 4.5 to
5.5
- 100 360 - 450 - 490 µA
NOTE:
3. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSV
I
(V) V
IS
(V) MIN TYP MAX MIN MAX MIN MAX
HCT Input Loading Table
INPUT UNIT LOADS
All 1
NOTE: Unit Load is ∆I
CC
limit specified in DC Electrical Specifica-
tions table, e.g., 360µA max at 25
o
C.
CD54HC4066, CD74HC4066, CD74HCT4066
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