srio协议分析 逻辑层 物理层

Serial RapidIO 协议分析

1. 物理层特性

1.1 Two transmitters(short run and long run) and a single receiver are specified for each of

three baudrates, 1.25, 2.50, and 3.125 GBaud.

1.2 The short run transmitter should be used mainly for chip-to-chip connections on either

the same printed circuit board or across a single connector.

1.3 The long run transmitter specifications use larger voltage swings that are capable of

driving signals across backplanes. This allows a user to drive signals across two

equalization.

2. 信号定义

Signal pin descriptions for a RapidIO 1x/4x LP-Serial port. The interface is defined either as

a single- or four-lane, full duplex, point-to-point interface using differential signaling. A single-

lane implementation consists of 4 wires and a four-lane implementation consists of 16 wires.