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A4911KJPTR.pdf
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更新于2023-03-03
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A4911KJPTR资料,无刷驱动IC,做无刷电机非常好用的一款IC! The A4911 is an N-channel power MOSFET driver capable of controlling MOSFETs connected in a 3-phase bridge arrangement and is specifically designed for automotive applications with highpower inductive loads, such as BLDC motors.
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A4911
Automotive, Three Phase MOSFET Driver
4911-DS Preliminary 22 Dec 2014
Allegro Microsystems, LLC
Confidential Information
Features
3-Phase Bridge MOSFET Driver
Bootstrap gate drive for n-channel MOSFET bridge
Cross-conduction protection with adjustable dead time
Charge pump for low supply voltage operation
Programmable Gate Drive Voltage and Strength
5.5V-50V Supply voltage operating range
Integrated logic supply
Three current sense amplifiers
Programmable gain and offset with offset output
SPI compatible serial interface
Bridge control by direct logic inputs or serial interface
TTL Compatible logic inputs
Extensive programmable diagnostics
Diagnostic verification
Safety Assist features
Product – device features for safety critical systems
Package: 48 Lead eLQFP (suffix JP)
Description
The A4911 is an N-channel power MOSFET driver capable of
controlling MOSFETs connected in a 3-phase bridge arrangement
and is specifically designed for automotive applications with high-
power inductive loads, such as BLDC motors.
The A4911 is intended for automotive systems that must meet
ASIL requirements. In common with other Allegro A
2
SIL
TM
products, it incorporates features to complement proper system
design, allowing users to achieve up to ASIL-D system
classification.
A unique charge pump regulator provides the supply for the
MOSFET gate drive for battery voltages down to 7 V and
allows the A4911 to operate with a reduced gate drive down to
5.5 V. Gate drive voltage and strength are programmable to
help reduce EMC issues. A bootstrap capacitor is used to
provide the above-battery supply voltage required for N-
channel MOSFETs.
Full control over all six power MOSFETs in the 3-phase bridge
is provided, allowing motors to be driven with block
commutation or sinusoidal excitation. The power MOSFETs
are protected from shoot-through by integrated crossover
control and optional programmable dead time.
Integrated diagnostics provide indication of multiple internal
faults, system faults, and power bridge faults, and can be
configured to protect the power MOSFETs under most short
circuit conditions. For safety critical systems the integrated
diagnostic operation can be verified under control of the serial
interface.
The serial interface is provided to alter programmable settings
and read back detailed diagnostic information.
The A4911 is supplied in a 48 lead eLQFP (suffix ‘JP’). It is in
lead (Pb) free versions, with 100% matte-tin lead frame
plating.
Typical Applications - Functional Block Diagram
Current
Sense
3-
Phase
BLDC
Motor
A4911
Control
Diagnostics
VBAT
DSP
or
µC
440x
DC-
DC
Lampek For XingJiang
Steering Gear
A4911 Automotive, Three Phase MOSFET Driver
Preliminary 2
Allegro MicroSystems, LLC.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Allegro Microsystems, LLC
Confidential Information
Selection Guide
Part Number
Packing
Package
A4911KJPTR-T
1500 pieces per 13-in. reel
7 mm x 7 mm, 1.6 mm nominal height
48 lead LQFP with exposed thermal pad
Absolute Maximum Ratings
1,2
Characteristic
Symbol
Conditions
Rating
Units
Load supply voltage
V
BB
-0.3 to 50
V
Analog ground
AGND (Connect AGND to GND at package)
-0.1 to 0.1
V
Pumped regulator terminal
V
REG
VREG
-0.3 to 16
V
Charge pump capacitor low terminal
V
CP1
CP1
-0.3 to 16
V
Charge pump capacitor high terminal
V
CP2
CP2
V
CP1
-0.3 to
V
REG
+0.3
V
Battery compliant logic input terminals
V
IB
HA, HB, HC, LA, LB, LC
RESETn, ENABLE
-0.3 to 50
V
Logic input terminals
V
I
STRn, SCK, SDI
-0.3 to 6
V
Logic Output terminals
V
O
SDO, SAL, SBL, SCL
-0.3 to 6
V
Diagnostic output terminal
V
DIAG
DIAG
-0.3 to 50
V
Sense amplifier inputs
V
CSI
CSxP,CSxM
-4 to 6.5
V
Sense amplifier output
V
CSO
CSxO
-0.3 to 6
V
Sense amplifier output offset
V
OOS
OOS
-0.3 to 6
V
Bridge drain monitor terminals
V
BRG
VBRG
-5 to 55
V
Bootstrap supply terminals
V
CX
CA, CB, CC
-0.3 to V
REG
+50
V
High-side gate drive output terminals
V
GHX
GHA, GHB, GHC
V
CX
-16 to
V
CX
+0.3
V
GHA, GHB, GHC (Transient)
3
-18 to V
CX
+0.3
V
Motor phase terminals
V
SX
SA, SB, SC
V
CX
-16 to
V
CX
+0.3
V
SA, SB, SC (Transient)
3
-18 to V
CX
+0.3
V
Low-side gate drive output terminals
V
GLX
GLA, GLB, GLC
V
REG
-16 to 18
V
GLA, GLB, GLC (Transient)
3
-8 to 18
V
Bridge low-side source terminals
V
LSS
LSSA, LSSB, LSSC
V
REG
-16 to 18
V
LSSA, LSSB, LSSC (Transient)
3
-8 to 18
V
Ambient Operating Temperature Range
T
A
Limited by power dissipation
-40 to 150
C
Maximum continuous junction
temperature
T
J(max)
165
C
Transient Junction Temperature
T
Jt
Over temperature event not exceeding 10s,
lifetime duration not exceeding 10hours,
guaranteed by design characterization.
180
C
Storage Temperature Range
T
stg
-55 to 150
C
1
With respect to GND. Ratings apply when no other circuit operating constraints are present
2
Lowercase “x” in pin names and symbols indicates a variable sequence character
3
Not tested in production. Confirmed by design and characterisation.
Thermal Characteristics may require derating at maximum conditions
Characteristic
Symbol
Test Conditions*
Value
Units
Package Thermal Resistance
R
JA
4-layer PCB based on JEDEC standard
23
C/W
2-layer PCB with 3.8in
2
Copper each side
44
C/W
R
JP
2
C/W
* Additional thermal information available on the Allegro website.
Lampek For XingJiang
Steering Gear
A4911 Automotive, Three Phase MOSFET Driver
Preliminary 3
Allegro MicroSystems, LLC.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Allegro Microsystems, LLC
Confidential Information
Table of Contents
Features ......................................................................... 1
Selection Guide ............................................................. 2
Absolute maximum ratings ........................................... 2
Thermal Characteristics ................................................. 2
Pin-out Diagram ........................................................... 4
Terminal List ................................................................. 4
Functional Block Diagram ............................................ 5
Electrical Characteristics Table ..................................... 6
Supply and reference ............................................... 6
Gate output drive ..................................................... 7
Logic inputs and outputs .......................................... 8
Logic I/O Dynamic Parameters ............................... 8
Current Sense Amplifiers ........................................ 9
Diagnostics and Protection .................................... 10
Diagnostic Verification .......................................... 11
Sense Amp Voltage Definitions Diagram ................... 12
Serial Interface Timing Diagram ................................. 12
Gate Drive Timing Diagrams ...................................... 12
Overcurrent Fault Monitor Timing Diagram ............... 13
VDS Fault Monitor Timing Diagrams ........................ 13
Logic truth tables ......................................................... 14
Control logic : Logic Inputs ................................... 14
Control logic : Serial Register ............................... 14
Control logic : Combined inputs and register ........ 14
Open Load Detect Mode ........................................ 15
Functional Description ................................................ 16
Input & Output Terminal Functions ...................... 16
Power Supplies ...................................................... 17
Gate Drives ............................................................ 18
Logic Control Inputs .............................................. 21
Current Sense Amplifiers ...................................... 22
Diagnostic Monitors .................................................... 23
DIAG diagnostic output ......................................... 23
Diagnostic Functions Table ................................... 23
Diagnostic Registers .............................................. 24
Chip-Level protection ............................................ 24
Operational Monitors ............................................. 25
Power Bridge & Load Faults ................................. 26
Fault action ............................................................ 30
Fault action table .................................................... 30
Fault Masks ............................................................ 30
Diagnostic and System Verification ............................ 31
Verification Functions Table .................................. 31
On-Line Verification .............................................. 31
Off-Line Verification ............................................. 32
Serial Interface ............................................................. 36
Serial registers definition ....................................... 36
Configuration Registers ......................................... 38
Verification Registers ............................................. 39
Diagnostic Registers ............................................... 40
Control Register ..................................................... 40
Status Register ........................................................ 40
Serial Register Reference ............................................. 42
Config 0, 1 .............................................................. 42
Config 2, 3 .............................................................. 43
Config 4, 5 .............................................................. 44
Config 6, 7 .............................................................. 45
Config 8, 9 .............................................................. 46
Config 10, 11 .......................................................... 47
Config 12, 13 .......................................................... 48
Verify Command 0, 1, 2 ......................................... 49
Verify Result 0, 1 ................................................... 50
Mask 0, 1, 2 ............................................................ 51
Diag 0, 1, 2 ............................................................. 52
Control ................................................................... 53
Status ...................................................................... 54
Applications Information ............................................. 55
Dead time selection ................................................ 55
Bootstrap capacitor selection ................................. 55
Bootstrap charging ................................................. 55
VREG capacitor selection ...................................... 56
Supply decoupling .................................................. 56
Braking ................................................................... 56
Current sense amplifier configuration .................... 56
Input / Output Structures .............................................. 58
Package Drawing : 48 LQFP ....................................... 59
Lampek For XingJiang
Steering Gear
A4911 Automotive, Three Phase MOSFET Driver
Preliminary 4
Allegro MicroSystems, LLC.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Allegro Microsystems, LLC
Confidential Information
Pin-out Diagram
Terminal List
Terminal
Name
Terminal Description
No
Terminal
Name
Terminal Description
No
AGND
Analogue Ground
9
HB
Control Input B High Side
20
CA
Bootstrap Capacitor Phase A
2
HC
Control Input C High Side
22
CB
Bootstrap Capacitor Phase B
45
LA
Control Input A Low Side
19
CC
Bootstrap Capacitor Phase C
40
LB
Control Input B Low Side
21
CP1
Pump Capacitor
5
LC
Control Input C Low Side
23
CP2
Pump Capacitor
4
LSSA
Low-side Source Phase A
46
CS1M
Current Sense Amp 1 -Input
34
LSSB
Low-side Source Phase B
41
CS1O
Current Sense Amp 1 Output
35
LSSC
Low-side Source Phase C
36
CS1P
Current Sense Amp 1 +Input
33
OOS
Sense amp programmed offset output
10
CS2M
Current Sense Amp 2 -Input
31
PGND
Power Ground
6
CS2O
Current Sense Amp 2 Output
32
RESETn
Standby Mode Control
12
CS2P
Current Sense Amp 2 +Input
30
SA
Motor Connection Phase A
1
CS3M
Current Sense Amp 3 -Input
28
SAL
Phase A logic output
24
CS3O
Current Sense Amp 3 Output
29
SB
Motor Connection Phase B
44
CS3P
Current Sense Amp 3 +Input
27
SBL
Phase B logic output
25
DIAG
Programmable diagnostic output
17
SC
Load Connection Phase C
39
ENABLE
Direct Output Activity Control
11
SCK
Serial Clock Input
14
GHA
High-side Gate Drive Phase A
48
SCL
Phase C logic output
26
GHB
High-side Gate Drive Phase B
43
SDI
Serial Data Input
15
GHC
High-side Gate Drive Phase C
38
SDO
Serial Data output
16
GLA
Low-side Gate Drive Phase A
47
STRn
Serial Strobe (chip select) Input
13
GLB
Low-side Gate Drive Phase B
42
VBB
Main Power Supply
7
GLC
Low-side Gate Drive Phase C
37
VBRG
High-side Drain voltage sense
8
HA
Control Input A High Side
18
VREG
Gate Drive Supply Output
3
TAB
Connect to Ground
Tab
STRn
SCK
SDI
SDO
DIAG
HA
LA
HB
LB
HC
LC
SAL
GHA
GLA
LSSA
CB
SB
GHB
GLB
LSSB
CC
SC
GHC
GLC
SA
CA
VREG
CP2
CP1
PGND
VBB
VBRG
AGND
OOS
ENABLE
RESETn
LSSC
CS1O
CS1M
CS1P
CS2O
CS2M
CS2P
CS3O
CS3M
CS3P
SCL
SBL
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
Lampek For XingJiang
Steering Gear
A4911 Automotive, Three Phase MOSFET Driver
Preliminary 5
Allegro MicroSystems, LLC.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Allegro Microsystems, LLC
Confidential Information
Functional Block Diagram
Phase A -
repeated for
B & C
VBAT
HA
LA
HB
LB
DIAG
CS1P
GLA
GHA
SA
CA
C
BOOTA
VBRG
CS1O
AGND
STRn
SCK
SDO
RESETn
Diagnostics &
Protection
CS1M
VREG
Charge
Pump
Bootstrap
Monitor
VDS
Monitor
VDS
Monitor
LS
Drive
ENABLE
SDI
LSSA
PGND
Diagnostic
Verification
HC
LC
Load :
Phase A
DAC
HS
Drive
OOS
Control
Logic
Timers
Serial
Interface
CP2
C
P
CP1
VREG
C
REG
V
DD
VBB
Charge
Pump
Regulator
Ref
SAL
V
PT
SCL
SB
SC
Logic
Supply
Regulator
SA
SBL
DAC
V
OOS
+
+
+
+
V
DAC
V
DAC
= V
OCT
or V
OLTH
Lampek For XingJiang
Steering Gear
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